Intersil IRFF230 Datasheet

IRFF230

Data Sheet March 1999

5.5A, 200V, 0.400 Ohm, N-Channel
Power MOSFET

This N-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdown avalanche mode of operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.

Formerly developmental type TA17412.

Ordering Information

PART NUMBER PACKAGE BRAND

IRFF230 TO-205AF IRFF230

NOTE: When ordering, include the entire part number.

File Number 1892.3

Features

• 5.5A, 200V

•r

DS(ON)

• Single Pulse Avalanche Energy Rated

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount

= 0.400Ω

Components to PC Boards”

Symbol

D

Packaging

DRAIN
(CASE)

G

S

JEDEC TO-205AF

SOURCE

GATE

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

IRFF230

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

IRFF230 UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DGR

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P

DS

D

DM

GS

D

200 V
200 V

5.5 A
22 A

±20 V

25 W

Linear Derating Factor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.2 W/oC

Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, T

AS

STG

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

pkg

85 mJ

-55 to 150

300
260

o

C

o

C

o

C

NOTE:

1. TJ= 25oC to 125oC.

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV
Gate to Threshold Voltage V

GS(TH)VGS

Zero-Gate Voltage Drain Current I

On-State Drain Current (Note 2) I

D(ON)

Gate to Source Leakage Forward I
Drainto Source On Resistance (Note 2) r

DS(ON)VGS

Forward Transconductance (Note 2) g
Turn-On Delay Time t

d(ON)

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t
Total Gate Charge

Q

g(TOT)VGS

(Gate to Source + Gate to Drain)
Gate to Source Charge Q
Gate to Drain “Miller” Charge Q
Input Capacitance C
Output Capacitance C
Reverse-Transfer Capacitance C
Internal Drain Inductance L

Internal Source Inductance L

Junction to Case R
Junction to ambient R

DSSVGS

DSS

GSS

fs

r

f

gs
gd

ISS
OSS
RSS

D

S

θJC

θJA

= 0V, ID = 250µA (Figure 10) 200 - - V

= VDS, ID = 250µA 2.0 - 4.0 V
VDS = Rated BV
VDS = 0.8 x Rated BV
VDS> I

D(ON) xrDS(ON)MAX

, VGS = 0V - - 25 µA

DSS

, VGS = 0V, TJ = 125oC - - 250 µA

DSS

, VGS = 10V (Figure 7) 5.5 - - A

VGS = ±20V - - ±100 nA

= 10V, ID = 3.0A (Figures 8, 9) - 0.25 0.4 Ω
VDS>I

D(ON) xrDS(ON)MAX

VDD≅ 0.5 x Rated BV
VGS = 10V, RL = 28.7Ω For V
RL = 21.4Ω For V

DSS

MOSFET Switching Times are Essentially
Independent of Operating Temperature

= 10V, ID = 5.5A, VDS = 0.8 x Rated B
I

=1.5mA (Figures 14, 19, 20) Gate Charge is

G(REF)

Essentially Independent of Operating Temperature

, ID = 3.0A (Figure 12) 2.5 4.5 - S

, I

≈ 5.5A, R

DSS

D

DSS

= 120V (Figures 17, 18)

G

= 160V,

= 9.1Ω,

- - 30 ns

- - 50 ns

- - 50 ns

- - 40 ns

,

VDSS

-1930nC

-10-nC

- 9.0 - nC

VGS = 0V, VDS = 25V, f = 1.0MHz (Figure 11) - 600 - pF

- 250 - pF

-80-pF

Measured from the Drain
Lead, 5mm (0.2in) from
Header to Center of Die

Measured from the
Source Lead, 5mm
(0.2in) from Header to
Source Bonding Pad

Modified MOSFET
Symbol Showing the
Internal Device
Inductances

D

L

D

G

L

S

S

- 5.0 - nH

-15-nH

- - 5.0

- - 175

o

C/W

o

C/W

2

IRFF230

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current I
Pulse Source to Drain Current

I

SDM

SD

(Note 3)

Source to Drain Diode Voltage (Note 2) V
Reverse Recovery Time t
Reverse Recovered Charge Q
Forward Turn-On Time t

ON

NOTES:

2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.

3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).

4. VDD = 20V, start TJ = 25oC, L = 8.9mH, RG = 50Ω, peak IAS= 5.5A (Figures 15, 16).

Modified MOSFET
Symbol Showing the

D

Integral Reverse P-N
Junction Rectifier

TJ = 25oC, ISD= 5.5A, VGS = 0V (Figure 13) - - 2.0 V

SD

TJ = 150oC, ISD = 5.5A, dISD/dt = 100A/µs - 450 - ns

rr

TJ = 150oC, ISD = 5.5A, dISD/dt = 100A/µs - 3.0 - µC

RR

G

S

Intrinsic Turn-On Time is Negligible, Turn-On
Speed is Substantially Controlled by LS + L

D

- - 5.5 A

- - 22 A

-- - -

Typical Performance Curves Unless Otherwise Specified

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 50 100 150

TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE

1.0

0.5

0.2

0.1

0.1

, NORMALIZED

θJC

Z

THERMAL IMPEDANCE

0.05

0.02

0.01

-2

10

-5

10

SINGLE PULSE

-4

10

-3

10

T

1

6.0

4.8

3.6

2.4

, DRAIN CURRENT (A)

D

I

1.2

0

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

-2

10

, RECTANGULAR PULSE DURATION (s)

1/t2

x R

θJC

125

+ T

C

50 75 10025 150

TC, CASE TEMPERATURE (oC)

P

DM

t

1

t

2

NOTES:
DUTY FACTOR: D = t
PEAK TJ= PDM x Z

-1

10

θJC

110

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

3