Intersil IRFD9110 Datasheet

IRFD9110

Data Sheet July 1999

0.7A, 100V, 1.200 Ohm, P-Channel Power
MOSFET

This P-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdown avalanchemodeofoperation.Allof
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.

Formerly developmental type TA17541.

Ordering Information

PART NUMBER PACKAGE BRAND

IRFD9110 HEXDIP IRFD9110

NOTE: When ordering, use the entire part number.

File Number

Features

• 0.7A, 100V

DS(ON)

= 1.200Ω

•r

• Single Pulse Avalanche Energy Rated

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

Symbol

D

G

S

2215.3

Packaging

HEXDIP

DRAIN

GATE

SOURCE

4-39

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

IRFD9110

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

IRFD9110 UNITS

Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DGR

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Maximum Power Dissipation (Figure 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P

DS

D

DM

GS

D

-100 V

-100 V

-0.7 A

-3.0 A
±20 V

1.0 W

Dissipation Derating Factor (Figure 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.008 W/oC

Single Pulse Avalanche Energy Rating (Note 3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ,T

AS

STG

190 mJ

-55 to 150

o

C

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

pkg

300
260

o

C

o

C

NOTE:

1. TJ = 25oC to 125oC.

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV
Gate Threshold Voltage V
Zero Gate Voltage Drain Current I

On-State Drain Current (Note 2) I

DSSID

GS(TH)VGS

DSS

D(ON)VDS

= -250µA, VGS = 0V, (Figure 9) -100 - - V

= VDS, ID = -250µA -2 - -4 V
VDS = Rated BV
VDS = 0.8 x Rated BV

> I

D(ON)

, VGS = 0V - - -25 µA

DSS

, VGS = 0V, TC = 125oC - - -250 µA

DSS

x r

DS(ON)MAX, VGS

= -10V,

-0.7 - - A

(Figure 6)

Gate to Source Leakage Current I
Drain to Source On Resistance (Note 2) r

DS(ON)ID

Forward Transconductance (Note 2) g
Turn-On Delay Time t

d(ON)VDD

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t

Total Gate Charge

Q

g(TOT)VGS

(Gate to Source + Gate to Drain)
Gate to Source Charge Q
Gate to Drain “Miller” Charge Q
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Internal Drain Inductance L

Internal Source Inductance L

Thermal Resistance Junction to Ambient R

GSS

VGS = ±20V - - ±100 nA

= -0.3A, VGS = -10V, (Figures 8) - 1.000 1.200 Ω

VDS≤ 50V, ID = -0.6A, (Figure 11) 0.59 0.88 - S

fs

= 0.5 x Rated BV
VGS =-10V, (Figures 16, 17),

r

RL= 70Ω for V
RL = 56Ω for V
MOSFET Switching Times are Essentially

f

Independent of Operating Temperature

DSS

DSS

= 50V
= 40V

= -10V, ID= -0.7A, VDS= 0.8V x Rated BV

= -0.7A, RG = 9.1Ω,

DSS, ID

DSS,

-1530ns

-3060ns

-2040ns

-2040ns

-1115nC
(Figures 13, 18, 19) Gate Charge is
Essentially Independent of Operating

gs

Temperature

gd

VDS = -25V, VGS = 0V, f = 1MHz, (Figure 10) - 180 - pF

ISS
OSS
RSS

Measured From the Drain

D

Lead, 2mm (0.08in) From
Package to Center of Die

Measured From the

S

Source Lead, 2mm
(0.08in) From Header to
Source Bonding Pad

Typical Socket Mount - - 120oC/W

θJA

Modified MOSFET
Symbol Showing the
Internal Devices
Inductances

D

L

D

G

L

S

S

- 5.7 - nC

- 5.3 - nC

-85-pF

-30-pF

- 4.0 - nH

- 6.0 - nH

4-40