Intersil IRFD220 Datasheet

IRFD220

Data Sheet July 1999

0.8A, 200V, 0.800 Ohm, N-Channel
Power MOSFET

This N-Channel enhancementmode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdownavalanchemodeof operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.

Formerly developmental type TA09600.

Ordering Information

PART NUMBER PACKAGE BRAND

IRFD220 HEXDIP IRFD220

NOTE: When ordering, use the entire part number.

File Number

Features

• 0.8A, 200V

•r

• Single Pulse Avalanche Energy Rated

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount

= 0.800Ω

DS(ON)

Components to PC Boards”

Symbol

D

G

2317.3

Packaging

S

HEXDIP

DRAIN

GATE

SOURCE

4-287

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

IRFD220

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

IRFD220 UNITS

Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

DGR

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

DS

D

DM

GS

D

200 V
200 V

0.8 A

6.4 A

±20 V

1.0 W

Linear Derating Factor (See Figure 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.008 W/oC

Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ,T

AS

STG

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

pkg

85 mJ

-55 to 150

300
260

o

C

o

C

o

C

NOTE:

1. TJ = 25oC to TJ = 125oC.

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV
Gate to Threshold Voltage V

GS(TH)VGS

Zero Gate Voltage Drain Current I

On-State Drain Current (Note 2) I

D(ON)

Gate to Source Leakage Current I
Drain to Source On Resistance (Note 2) r

DS(ON)ID

Forward Transconductance (Note 2) g
Turn-On Delay Time t

d(ON)

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t
Total Gate Charge

(Gate to Source + Gate to Drain) Q

g(TOT)

Gate to Source Charge Q
Gate to Drain “Miller” Charge Q
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Internal Drain Inductance L

Internal Source Inductance L

Thermal Resistance Junction to Ambient R

DSSID

DSS

GSS

fs

r

f

gs
gd

ISS
OSS
RSS

D

S

θJA

= 250µA, VGS = 0V (Figure 9) 200 - - V

= VDS, ID = 250µA 2.0 - 4.0 V
VDS = Rated BV
VDS = 0.8 x Rated BV
VDS>I

D(ON)xrDS(ON)MAX,VGS

, VGS = 0V - - 25 µA

DSS

, VGS = 0V, TC = 125oC - - 250 µA

DSS

= 10V (Figure 6) 0.8 - - A

VGS = ±20V - - ±100 nA

= 0.4A, VGS = 10V (Figures 7, 8) - 0.5 0.8 Ω
VDS > I
VDD= 0.5 x Rated BV

RG = 9.1Ω, RL = 74Ω, VGS = 10V,
MOSFET Switching Times are Essentially
Independent of Operating Temperature

D(ON)

x r

DS(ON)MAX

, ID = 0.4A (Figure 11) 0.5 1.1 - S

, ID ≈ 0.8A,

DSS

-2040ns

-3060ns

- 50 100 ns

-3060ns

VGS = 10V, I
I

G(REF)

Essentially Independent of Operating Temperature

≈ 0.8A, V

D

= 0.8 x Rated BV

DS

= 1.5mA, (Figure 13) Gate Charge is

DSS

-1115nC

- 6.0 - nC

- 5.0 - nC

VGS = 0V, VDS = 25V, f = 1MHz (Figure 10) - 450 - pF

- 150 - pF

-40- pF

Measured from the Drain
Lead, 2mm (0.08in) from
Package to Center of Die

Measuredfrom theSource
Lead, 2mm (0.08in) from
Headerto SourceBonding
Pad

Free Air Operation - - 120

Modified MOSFET
Symbol Showing the
Internal Devices
Inductances

D

L

D

G

L

S

S

- 4.0 - nH

- 6.0 - nH

o

C/W

4-288

IRFD220

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current I
Pulse Source to Drain Current

SD

I

SDM

(Note 3)

Source to Drain Diode Voltage (Note 2) V

SD

Reverse Recovery Time t
Reverse Recovery Charge Q

RR

NOTES:

2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.

3. Repetitive rating: pulse width limited by Max junction temperature.

4. VDD= 25V, starting TJ= 25oC, L = 12.62mH, RG= 50Ω,peak IAS= 3.5A.

Modified MOSFET
Symbol Showing the
Integral Reverse P-N
Junction Diode

TJ=25oC, ISD= 0.8A, VGS= 0V (Figure 12) - - 2.0 V
TJ = 150oC, ISD = 0.8A, dISD/dt = 100A/µs - 150 - ns

rr

TJ = 150oC, ISD = 0.8A, dISD/dt = 100A/µs - 0.6 - µC

D

- - 0.8 A

- - 6.4 A

G

S

Typical Performance Curves

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 25 50 75 100 150

TA, AMBIENT TEMPERATURE (oC)

Unless Otherwise Specified

125

FIGURE 1. NORMALIZEDPOWER DISSIPATIONvs AMBIENT

TEMPERATURE

10

1

0.1

OPERATION IN THIS
AREA MAY BE

0.01

LIMITED BY r

TC = 25oC

= MAX RATED

T

J

V

DS

, DRAIN CURRENT (A)

D

I

0.001

DS(ON)

101

, DRAIN TO SOURCE VOLTAGE (V)

10

10µs
100µs
1ms

10ms
100ms

1s
DC

2

1.0

0.8

0.6

0.4

, DRAIN CURRENT (A)

D

I

0.2

0

50 75 10025 150

TA, AMBIENT TEMPERATURE (oC)

125

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

AMBIENT TEMPERATURE

10

8

6

4

, DRAIN CURRENT (A)

D

I

2

3

10

0

VGS = 10V

VGS = 7V

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

VGS = 6V

VGS = 5V

VGS = 4V

020406080

VDS, DRAIN TO SOURCE VOLTAGE (V)

100

FIGURE 3. FORWARD BIAS SAFE OPERATING AREA FIGURE 4. OUTPUT CHARACTERISTICS

4-289

IRFD220

Typical Performance Curves

5

4

3

2

, DRAIN CURRENT (A)

D

I

1

0

02468

VDS, DRAIN TO SOURCE VOLTAGE (V)

VGS = 6V

VGS = 5V

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

VGS = 4V

Unless Otherwise Specified (Continued)

V

= 10V

GS

VGS = 8V

FIGURE 5. SATURATION CHARACTERISTICS FIGURE 6. TRANSFER CHARACTERISTICS

1.0

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

0.8
VGS= 20V

10

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

> I

V

DS

8

6

4

, ON-STATE DRAIN CURRENT (A)

2

D(ON)

I

10

0

VGS = 10V, ID = 0.4A

2.2

1.8

x r

D(ON)

DS(ON)MAX

TJ = -55oC

TJ = 25oC

TJ = 125oC

VGS, GATE TO SOURCE VOLTAGE (V)

8642010

0.6

VGS= 10V

0.4

, ON-STATE RESISTANCE (Ω)

0.2

DS(ON)

r

0

24 8

ID, DRAIN CURRENT (A)

6

FIGURE 7. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT

ID = 250µA

1.25

1.15

1.05

0.95

BREAKDOWN VOLTAGE

0.85

NORMALIZED DRAIN TO SOURCE

0.75

-40

0 40 80 120

T

, JUNCTION TEMPERATURE (oC)

J

160

1.4

1.0

0.6

NORMALIZED ON RESISTANCE

100

0.2
0-40

, JUNCTION TEMPERATURE (oC)

T

J

40

80

120 160

FIGURE 8. NORMALIZED DRAIN TOSOURCE ON

RESIST ANCE vs JUNCTION TEMPERATURE

1000

800

600

400

C, CAPACITANCE (pF)

200

0

0

C

ISS

C

OSS

C

RSS

10

V

DS

20

, DRAIN TO SOURCE VOLTAGE (V)

VGS = 0V, f = 1MHz
C

= CGS + C

ISS

C

= C

RSS

C

= CDS+ C

OSS

30

GD

GD

GD

40

50

FIGURE 9. NORMALIZED DRAINTOSOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

4-290

FIGURE 10. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

IRFD220

Typical Performance Curves

5

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

4

3

2

1

, TRANSCONDUCTANCE (S)

fs

g

0

02468

ID, DRAIN CURRENT (A)

Unless Otherwise Specified (Continued)

10

TJ = -55oC

TJ = 25oC

TJ = 125oC

1

, SOURCE TO DRAIN CURRENT (A)

SD

I

10

0.1

0

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

TJ = 150oC

TJ = 25oC

132

VSD, SOURCE TO DRAIN VOLTAGE (V)

FIGURE 11. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 12. SOURCE TO DRAIN DIODE VOLTAGE

20

ID = 0.8A

15

10

VDS = 160V

VDS = 40V

VDS = 100V

, GATE TO SOURCE (V)

GS

V

FIGURE 13. GATE TO SOURCE VOLTAGE vs GATE CHARGE

Test Circuits and Waveforms

VARY t

TO OBTAIN

P

REQUIRED PEAK I

V

GS

t

0V

P

AS

R

G

5

0

0 8 12 20

V

DS

I

AS

416

Q

, GATE CHARGE (nC)

g

L

+

V

DD

-

DUT

0

0.01Ω

BV

DSS

t

P

I

AS

t

AV

V

DS

V

DD

FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS

4-291

IRFD220

Test Circuits and Waveforms

R

G

V

GS

FIGURE 16. SWITCHING TIME TEST CIRCUIT FIGURE 17. RESISTIVE SWITCHING WAVEFORMS

CURRENT

REGULATOR

12V

BATTERY

0.2µF

50kΩ

0.3µF

(Continued)

R

L

DUT

+

V

DD

-

V

DS

(ISOLATED
SUPPLY)

SAME TYPE
AS DUT

t

ON

t

d(ON)

t

gs

50%

10%

r

PULSE WIDTH

Q

Q

g(TOT)

gd

V

DS

90%

0

V

GS

10%

0

V

DD

Q

t

d(OFF)

90%

V

GS

t

OFF

50%

t

f

90%

10%

G

I

0

G(REF)

IG CURRENT

SAMPLING

RESISTOR RESISTOR

FIGURE 18. GATE CHARGE TEST CIRCUIT

D

S

CURRENT

I

D

SAMPLING

DUT

0

I

V

DS

0

G(REF)

FIGURE 19. GATE CHARGE WAVEFORMS

V

DS

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.

Intersil semiconductor products are sold by description only.Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with­out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site http://www.intersil.com

Sales Office Headquarters

NORTH AMERICA

Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: [phone]
FAX: [phone]

EUROPE

Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: [phone]
FAX: [phone]

ASIA

Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: [phone]
FAX: [phone]

4-292