These are P-Channel enhancement mode silicon-gate
power field-effect transistors. They are advanced power
MOSFETs designed, tested, and guaranteed to withstand a
specified level of energy in the breakdown avalanche mode
of operation. All of these power MOSFETs are designed for
applications such as switching regulators, switching
converters, motor drivers, relay drivers and as drivers for
other high-power switching devices. The high input
impedance allows these types to be operated directly from
integrated circuits.
Formerly developmental type TA17522.
Ordering Information
PART NUMBERPACKAGEBRAND
IRF9640TO-220ABIRF9640
RF1S9640SMTO-263ABRF1S9640
NOTE: When ordering, usetheentirepartnumber.Add the suffix 9Ato
obtain the TO-263AB variant in the tape and reel, i.e., RF1S9640SM9A.
File Number
Features
• 11A, 200V
DS(ON)
= 0.500Ω
•r
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
2284.2
Packaging
DRAIN (FLANGE)
JEDEC TO-220ABJEDEC TO-263AB
SOURCE
DRAIN
GATE
GATE
SOURCE
DRAIN
(FLANGE)
4-33
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
pkg
790mJ
-55 to 150
300
260
o
C
o
C
o
C
NOTE:
1. TJ = 25oC to 125oC
Electrical SpecificationsT
= 25oC, Unless Otherwise Specified
C
PARAMETERSYMBOLTEST CONDITIONSMINTYPMAXUNITS
Drain to Source Breakdown VoltageBV
Gate Threshold VoltageV
GS(TH)VGS
Zero Gate Voltage Drain CurrentI
On-State Drain Current (Note 2)I
D(ON)VDS
Gate to Source Leakage CurrentI
Drain to Source On Resistance (Note 2)r
FIGURE 6. SATURATION CHARACTERISTICSFIGURE 7. TRANSFER CHARACTERISTICS
5µs PULSE TEST
0.8
0.7
0.6
0.5
0.4
, DRAIN TO SOURCE
ON RESISTANCE (Ω)
0.3
DS(ON)
r
0.2
0
0
VGS= -10V
-15
-30
ID, DRAIN CURRENT (A)
VGS= -20V
-45-60
NOTE: Heating effect of 5µs pulse is minimal.
FIGURE 8. DRAIN TO SOURCE ON RESISTANCEvs GATE
VOLTAGE AND DRAIN CURRENT
4-36
-75
VGS = -10V, ID = -6A
2.5
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
2.0
1.5
1.0
ON RESISTANCE
0.5
NORMALIZED DRAIN TO SOURCE
0.0
-40040
, JUNCTION TEMPERATURE (oC)
T
J
80
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
120160
IRF9640, RF1S9640SM
Typical Performance Curves
1.15
ID = 250µA
1.10
1.05
1.00
0.95
BREAKDOWN VOLTAGE
0.90
NORMALIZED DRAIN TO SOURCE
0.85
-80-40040
T
, JUNCTION TEMPERATURE (oC)
J
Unless Otherwise Specified (Continued)
80120160
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
10
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
8
6
4
2
, TRANSCONDUCTANCE (S)
fs
g
0-10-20-30-40
I
, DRAIN CURRENT (A)
D
TJ = -55oC
TJ = 25oC
TJ = 125oC
-50
2000
1600
1200
800
C, CAPACITANCE (pF)
400
0
0
10
V
DS
20
, DRAIN TO SOURCE VOLTAGE (V)
VGS= 0V, f = 1MHz
C
= CGS + C
ISS
C
= C
RSS
C
≈ CDS+ C
OSS
C
ISS
C
OSS
C
RSS
3040
GD
GD
GD
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
-100
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
-0.4
TJ = 150oC
TJ = 25oC
-0.8-1.4
-1.0-1.2-1.6-1.8-0.6
VSD, SOURCE TO DRAIN VOLTAGE (V)
-10
-1.0
, DRAIN CURRENT (A)
SD
I
-0.1
50
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENTFIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
0
- 5
, GATE TO SOURCE (V)
GS
-10
V
020406080
VDS = -40V
Q
, Total GATE CHARGE (nC)
g(TOT)
VDS = -100V
VDS = -160V
ID = -11A
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
4-37
IRF9640, RF1S9640SM
Test Circuits and Waveforms
V
DS
VARY t
TO OBTAIN
P
REQUIRED PEAK I
0V
V
GS
t
P
AS
L
R
G
-
V
DD
+
DUT
I
AS
0.01Ω
0
V
DD
I
AS
t
P
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUITFIGURE 16. UNCLAMPED ENERGY WAVEFORMS
BV
t
AV
DSS
V
DS
DUT
R
V
GS
G
FIGURE 17. SWITCHING TIME TEST CIRCUIT
CURRENT
REGULATOR
12V
BATTERY
0.2µF
50kΩ
0.3µF
t
ON
t
d(ON)
t
R
L
-
V
DD
+
0
V
DS
V
GS
0
10%
r
10%
90%
50%
t
d(OFF)
t
OFF
50%
90%
t
f
10%
PULSE WIDTH
90%
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
-V
DS
(ISOLATED
SUPPLY)
DUT
D
0
V
DS
Q
gs
Q
gd
V
GS
G
0
I
g(REF)
IG CURRENT
SAMPLING
RESISTORRESISTOR
FIGURE 19. GATE CHARGE TEST CIRCUIT
4-38
DUT
S
CURRENT
I
D
SAMPLING
+V
DS
Q
g(TOT)
V
DD
0
I
g(REF)
FIGURE 20. GATE CHARGE WAVEFORMS
IRF9640, RF1S9640SM
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only.Intersil Corporation reserv esthe right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (407) 724-7000
FAX: (407) 724-7240
4-39
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
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