Intersil IRF820 Datasheet

IRF820

Data Sheet July 1999

2.5A, 500V, 3.000 Ohm, N-Channel Power
MOSFET

This N-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy inthe breakdown avalanche mode of operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.

Formerly developmental type TA17405.

Ordering Information

PART NUMBER PACKAGE BRAND

IRF820 TO-220AB IRF820

NOTE: When ordering, use the entire part number.

File Number

Features

• 2.5A, 500V

•r

• Single Pulse Avalanche Energy Rated

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount

= 3.000Ω

DS(ON)

Components to PC Boards”

Symbol

D

G

1581.4

Packaging

S

JEDEC TO-220AB

SOURCE

DRAIN

GATE

DRAIN (FLANGE)

4-245

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

IRF820

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

IRF820 UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DGR

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

TC= 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

DS

D
D

DM

GS

D

500 V
500 V

2.5

1.6

8.0 A

±20 V

50 W

A
A

Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.4 W/oC

Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ,T

AS

STG

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

pkg

210 mJ

-55 to 150

300
260

o

C

o

C

o

C

NOTE:

1. TJ= 25oC to 125oC.

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV
Gate Threshold Voltage V

GS(TH)VDS

Zero Gate Voltage Drain Current I

On-State Drain Current (Note 2) I

D(ON)VDS

Gate to Source Leakage Current I
Drain to Source On Resistance (Note 2) r

DS(ON)ID

Forward Transconductance (Note 2) g
Turn-On Delay Time t

d(ON)

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t
Total Gate Charge

Q

g(TOT)VGS

(Gate to Source + Gate to Drain)
Gate to Source Charge Q
Gate to Drain “Miller” Charge Q
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Internal Drain Inductance L

Internal Source Inductance L

Thermal Resistance Junction to Case R
Thermal Resistance Junction to Ambient R

DSSID

DSS

GSS

fs

r

f

gs
gd

ISS
OSS
RSS

D

S

θJC

θJA

= 250µA, VGS = 0V (Figure 10) 500 - - V

= VGS, ID = 250µA 2.0 - 4.0 V
VDS = Rated BV
VDS = 0.8 x Rated BV

> I

D(ON)

, VGS = 0V - - 25 µA

DSS

, VGS = 0V, TJ = 125oC - - 250 µA

DSS

x r

DS(ON)MAX

, VGS = 10V (Figure 7) 2.5 - - A

VGS = ±20V - - ±100 nA

= 1.4A, VGS = 10V (Figures 8, 9) - 2.5 3.0 Ω
VDS≥ 10V, ID = 2.0A (Figure 12) 1.5 2.3 - S
VDD = 250V, ID≈ 2.5A, RGS = 18Ω, RL = 96Ω

MOSFET Switching Times are Essentially
Independent of Operating Temperature

-1115ns

-1118ns

-2942ns

-1218ns

= 10V, ID = 2.5A, VDS = 0.8 x Rated BV

I

= 1.5mA

g(REF)

DSS

(Figure 14) Gate Charge is Essentially Independent
of Operating Temperature

-1219nC

- 2.5 - nC

- 6.0 - nC

VDS = 25V, VGS = 0V, f = 1MHz (Figure 11) - 360 - pF

-60-pF

-10-pF

Measured From the
Contact Screw on Tab to
Center of Die

Measured From the Drain
Lead, 6mm (0.25in) From
Package to Center of Die

MeasuredFrom the Source
Lead, 6mm (0.25in) from
Header to Source Bonding
Pad

Modified MOSFET
Symbol Showing the
Internal Device
Inductances

D

L

D

G

L

S

S

- 3.5 - nH

- 4.5 - nH

- 7.5 - nH

- - 2.5oC/W

Free Air Operation - - 80

o

C/W

4-246

IRF820

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current I
Pulse Source to Drain Current

SD

I

SDM

(Note 3)

Source to Drain Diode Voltage (Note 2) V
Reverse Recovery Time t
Reverse Recovery Charge Q

NOTES:

2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.

3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).

4. VDD= 50V, starting TJ= 25oC, L = 60mH, RG= 25Ω, peak IAS = 2.5A.

Modified MOSFET Symbol

Showing the Integral

Reverse P-N Junction

D

- - 2.5 A

- - 8.0 A

Rectifier

G

S

TJ = 25oC, ISD = 2.5A, VGS = 0V (Figure 13) - - 1.6 V

SD

TJ = 25oC, ISD = 2.5A, dISD/dt = 100A/µs 130 300 540 ns

rr

TJ = 25oC, ISD = 2.5A, dISD/dt = 100A/µs 0.57 1.4 2.3 µC

RR

Typical Performance Curves

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 50 100 150

TC, CASE TEMPERATURE (oC)

Unless Otherwise Specified

FIGURE 1. NORMALIZED POWERDISSIPATION vs CASE

TEMPERATURE

10

C/W)

o

0.5

1

0.2

0.1

, TRANSIENT
Z

θJC

THERMAL IMPEDANCE (

0.1

-2

10

10

0.05

0.02

0.01

SINGLE PULSE

-5

-4

10

10

2.5

2.0

1.5

1.0

, DRAIN CURRENT (A)

D

I

0.5

0

25 75 125

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

-3

t1, RECTANGULAR PULSE DURATION (s)

-2

10

50 100

TC, CASE TEMPERATURE (oC)

CASE TEMPERATURE

P

DM

t

1

t

NOTES:
DUTY FACTOR: D = t1/t

PEAK TJ = PDM x Z

0.1 1 10

2

θJC

2

+ T

150

C

4-247

FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE

IRF820

Typical Performance Curves

100

10

1

, DRAIN CURRENT (A)

D

I

0.1

OPERATION IN THIS AREA
IS LIMITED BY r

T

C

T

J

SINGLE PULSE

VDS, DRAIN TO SOURCE VOLTAGE (V)

DS(ON)

= 25oC

= MAX RATED

101

Unless Otherwise Specified (Continued)

10µs

100µs

1ms

10ms

2

10

DC

3

10

, DRAIN CURRENT (A)

D

I

5

VGS = 10V

4

3

2

1

0

0 50 100 150 200

VDS, DRAIN TO SOURCE VOLTAGE (V)

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

VGS = 6.0V

VGS = 5.5V

VGS = 5.0V

VGS = 4.5V

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

5

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

4

3

2

, DRAIN CURRENT (A)

D

I

1

0

0

4

VDS, DRAIN TO SOURCE VOLTAGE (V)

VGS = 10V

VGS = 6.0V

VGS = 5.5V

VGS = 5.0V

VGS = 4.0V

812 20

VGS = 4.5V

16

10

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

≥ 50V

V

DS

1

0.1

, DRAIN CURRENT (A)

D

I

-2

10

02468

TJ = 150oC

, GATE TO SOURCE VOLTAGE (V)

V

GS

TJ = 25oC

VGS = 4.0V

250

10

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

10

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

8

6

4

, DRAIN TO SOURCE

ON RESISTANCE (Ω)

DS(ON)

2

r

0

0246810

, DRAIN CURRENT (A)

I

D

VGS = 10V

VGS = 20V

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT

3.0

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

= 10V, ID = 2.5A

V

GS

2.4

1.8

1.2

ON RESISTANCE

0.6

NORMALIZED DRAIN TO SOURCE

0

-40 0 40
, JUNCTION TEMPERATURE (oC)

T

J

FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

4-248

80

120

160

IRF820

Typical Performance Curves

1.25
ID = 250µA

1.15

1.05

0.95

BREAKDOWNVOLTAGE

0.85

NORMALIZED DRAIN TO SOURCE

0.75

-40 0 40
, JUNCTION TEMPERATURE (oC)

T

J

Unless Otherwise Specified (Continued)

80

120

FIGURE 10. NORMALIZED DRAIN TOSOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

4.0

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

3.2
TJ = 25oC

2.4

TJ = 150oC

1.6

, TRANSCONDUCTANCE (S)

fs

0.8

g

0

0 0.8 1.6 2.4 3.2 4.0

, DRAIN CURRENT (A)

I

D

160

1000

VGS= 0V, f = 1MHz
C

= CGS + C

ISS

C

= C

RSS

800

C

≈ C

OSS

600

400

C, CAPACITANCE (nF)

200

0

110

GD

GD

+ C

DS

GD

C

ISS

C

OSS

C

RSS

VDS, DRAIN TO SOURCE VOLTAGE (V)

100

FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

100

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

10

TJ = 150oC

1

, SOURCE TO DRAIN CURRENT (A)

SD

I

0.1
0 0.4 0.8 1.2 1.6

, SOURCE TO DRAIN VOLTAGE (V)

V

SD

TJ = 25oC

2.0

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

20

ID = 2.5A

16

12

8

4

, GATE TO SOURCEVOLTAGE (V)

GS

V

0

048121620

IRF820, IRF822

= 400V

V

DS

VDS = 250V
V

= 100V

DS

Q

, GATE CHARGE (nC)

g

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

4-249

IRF820

Test Circuits and Waveforms

V

DS

BV

DSS

L

VARY t

TO OBTAIN

P

REQUIRED PEAK I

V

GS

AS

R

G

+

V

DD

-

DUT

0V

P

I

AS

0.01Ω

0

t

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

t

P

I

AS

t

AV

V

DS

V

DD

R

G

V

GS

FIGURE 17. SWITCHING TIME TEST CIRCUIT

CURRENT

REGULATOR

12V

BATTERY

0

0.2µF

50kΩ

I

g(REF)

0.3µF

G

IG CURRENT

SAMPLING

RESISTOR RESISTOR

R

L

DUT

D

S

I

D

SAMPLING

+

V

-

V

DS

(ISOLATED
SUPPLY)

SAME TYPE
AS DUT

DUT

V

CURRENT

DD

DS

t

ON

t

d(ON)

t

V

DS

0

V

GS

10%

0

r

90%

10%

50%

PULSE WIDTH

FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

V

DD

Q

g(TOT)

Q

gd

Q

gs

V

DS

0

I

G(REF)

0

t

d(OFF)

90%

V

GS

t

OFF

50%

t

f

90%

10%

FIGURE 19. GATE CHARGE TEST CIRCUIT

4-250

FIGURE 20. GATE CHARGE WAVEFORMS

IRF820

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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with­out notice. Accordingly , the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
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