intersil ICL7126 DATA SHEET

ICL7126

Data Sheet October 25, 2004

3 1/2 Digit, Low Power, Single Chip A/D Converter

The ICL7126 is a high performance, very low power

/2-digit, A/D converter. All the necessary active devices are contained on a single CMOS IC, including seven segment decoders, display drivers, reference, and cloc k. The ICL7126 is designed to interface with a liquid crystal display (LCD) and includes a backplane drive. The supply current of 100µA is ideally suited for 9V battery operation.

The ICL7126 brings together an unprecedented combination of high accuracy, versatility, and true economy. It features auto-zero to less than 10µV, zero drift of less than 1µV/

C, input bias current of 10pA maximum, and rollover error of less than one count. The versatility of true differential input and reference is useful in all systems, b ut gives the designer an uncommon advantage when measuring load cells, strain gauges and other bridge-type transducers. And finally the true economy of single power operation allows a high performance panel meter or multi-meter to be built with the addition of only 10 passive components and a display.

The ICL7126 can be used as a plug-in replacement for the ICL7106 in a wide variety of applications, changing only the passive components.

Ordering Information

TEMP. RANGE

PART NUMBER

(°C) PACKAGE

ICL7126CPL 0 to 70 40 Ld PDIP E40.6 ICL7126CPLZ

(Note 1)

0 to 70 40 Ld PDIP

(Pb-free) (Note 2)

NOTES:

1. Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020C.

2. Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.

PKG.

DWG. #

E40.6

FN3084.5

Features

• 8,000 Hours Typical 9V Battery Life

• Guaranteed Zero Reading for 0V Input on All Scales

• True Polarity at Zero for Precise Null Detection

• 1pA Typical Input Current

• True Differential Input and Reference

• Direct LCD Display Drive - No External Components Required

• Pin Compatible With the ICL7106

• Low Noise - Less Than 15µV

P-P

• On-Chip Clock and Reference

• Low Power Dissipation Guaranteed Less Than 1mW

• No Additional Active Circuits Required

• Pb-Free Available (RoHS Compliant)

Pinout

ICL7126 (PDIP)

TOP VIEW

OSC 1

40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21

OSC 2 OSC 3 TEST REF HI REF LO C

REF

COMMON IN HI IN LO A-Z BUFF INT VG2 (10s) C3

(100s)

A3 G3 BP/GND

(1s)

(10s)

(100s)

(1000) AB4

(MINUS)

V+ D1 C1 B1 A1 F1 G1 E1 D2 C2 B2 A2 F2 E2 D3 B3 F3 E3

POL

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

ICL7126

Absolute Maximum Ratings Thermal Information

Supply Voltage V+ to V-. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15V

Analog Input Voltage (Either Input) (Note 1) . . . . . . . . . . . . .V+ to V-

Reference Input Voltage (Either Input) . . . . . . . . . . . . . . . . .V+ to V-

Clock Input. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TEST to V+

Operating Conditions

Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

1. Input voltages may exceed the supply voltages provided the input current is limited to ±100µA. is measured with the component mounted on an evaluation PC board in free air.

2. θ

Thermal Resistance (Typical, Note 2)

(oC/W)

PDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . 150

Maximum Storage Temperature Range . . . . . . . . . . -65

C to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300

NOTE: Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.

Electrical Specifications T

= 25oC, V

= 100mV, f

REF

= 48kHz (Notes 1, 3)

CLOCK

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

SYSTEM PERFORMANCE

Zero Input Reading V

= 0.0V, Full Scale = 200mV -000.0 ±000.0 +000.0 Digital

Reading

Ratiometric Reading V

Rollover Error -V

= V

, V

REF

= +VlN ≅ 200mV

= 100mV 999 999/10001000 Digital

REF

- ±0.2 ±1 Counts

Reading

Difference in Reading for Equal Positiv e and Negative Inputs Near Full Scale

Linearity Full Scale = 200mV or Full Scale = 2V Maximum Deviation

- ±0.2 ±1 Counts

from Best Straight Line Fit (Note 5) Common Mode Rejection Ratio V Noise V

= ±1V, VIN = 0V, Full Scale = 200mV (Note 5) - 50 - µV/V

= 0V, Full Scale = 200mV

-15-µV

(Peak-To-Peak Value Not Exceeded 95% of Time) (Note 5) Leakage Current Input V Zero Reading Drift V Scale Factor Temperature Coefficient V

V+ Supply Current V COMMON Pin Analog Common Voltage 25kΩ Between Common and Positive Supply

= 0V (Note 5) - 1 10 pA

= 0V, 0

= 199mV, 0

(Ext. Ref. 0ppm/×oC) (Note 5)

= 0V (Does Not Include COMMON Current) - 70 100 µA

C To 70

C (Note 5) - 0.2 1 µV/oC

-15ppm/

2.4 3.0 3.2 V

(With Respect to + Supply) Temperature Coefficient of Analog Common 25kΩ Between Common and Positive Supply

-80-ppm/

(With Respect to + Supply) (Note 5) Peak-To-Peak Segment Drive Voltage

V+ = to V- = 9V (Note 4) 4 5.5 6 V Peak-To-Peak Backplane Drive Voltage

Power Dissipation Capacitance vs Clock Frequency - 40 - pF

NOTES:

3. Unless otherwise noted, specifications are tested using the circuit of Figure 1.

4. Back plane drive is in phase with segment drive for ‘off’ segment, 180 degrees out of phase for ‘on’ segment. Frequency is 20 times conversion rate. Average DC component is less than 50mV.

5. Not tested, guaranteed by design.

FN3084.5

Typical Application Schematics

ICL7126

+ -

1MΩ

240kΩ

TEST

REF HI

REF LO

10kΩ

0.1µF

REF

COM

IN HI

50pF

180kΩ

4039383736353433323130

OSC 1

OSC 2

OSC 3

ICL7126

V+D1C1B1A1F1G1E1D2C2B2 123456789

101112

DISPLAY

0.01

0.22µF

IN LO

750Ω

180kΩ

0.047µF

27262524232221

INT

A-Z

BUFF

A2F2E2D3B3F3E3

14151617181920

C1 = 0.1µF

DISPLAY

V-

AB4

POL

C2 = 0.22µF

= 0.047µF

C4 = 50pF

= 0.01µF

= 240kΩ

= 180kΩ

R4 = 10kΩ

= 1MΩ

FIGURE 1. ICL7126 TEST CIRCUIT AND T YPICAL APPLICATION WITH LCD DISPLAY COMPONENTS SELECTED

FOR 200mV FULL SCALE

SET REF = 100.0mV

50pF

180kΩ

4039383736353433323130

OSC 2

OSC 3

TEST

REF HI

OSC 1

V+D1C1B1A1F1G1E1D2C2B2

123456789

FIGURE 2. ICL7126 CLOCK FREQUENCY 16kHz, 1 READING/S

240kΩ

10kΩ

0.1µF

REF

REF LO

1MΩ

REF

COM

+ -

0.01

IN HI

IN LO

ICL7126

101112

DISPLAY

0.33µF

180kΩ

A-Z

BUFF

A2F2E2D3B3F3E3

DISPLAY

0.15µF

27262524232221

V-

INT

14151617181920

C1 = 0.1µF C2 = 0.33µF

= 0.5µF

= 50pF

= 0.01µF

= 240kΩ

AB4

POL

= 180kΩ

= 10kΩ

R5 = 1MΩ

FN3084.5

Typical Application Schematics (Continued)

+ -

ICL7126

240kΩ

50pF

180kΩ

4039383736353433323130

OSC 1

TEST

OSC 2

OSC 3

REF HI

REF LO

10kΩ

0.1µF

REF

1MΩ

REF

COM

0.01

0.22µF

IN HI

IN LO

750Ω

180kΩ

0.047µF

27262524232221

V-

INT

A-Z

BUFF

DISPLAY

ICL7126

V+D1C1B1A1F1G1E1D2C2B2A2F2E2D3B3F3 123456789

FIGURE 3. CLOCK FREQUENCY 48kHz, 3 READINGS/S

101112

DISPLAY

14151617181920

C1 = 0.1µF

= 0.22µF

C3 = 0.047µF

= 50pF

C5 = 0.01µF

= 240kΩ

AB4

POL

R2 = 180kΩ

= 180kΩ

= 10kΩ

= 1MΩ

FN3084.5

Design Information Summary Sheet

• OSCILLATOR FREQUENCY f

= 0.45/RC

OSC

> 50pF; R

OSC

(Typ) = 48kHz

OSC

• OSCILLATOR PERIOD

= RC/0.45

OSC

• INTEGRATION CLOCK FREQUENCY

CLOCK

= f

OSC

• INTEGRATION PERIOD

= 1000 x (4/f

INT

• 60/50Hz REJECTION CRITERION t

INT/t60Hz

or t

• OPTIMUM INTEGRATION CURRENT

= 4µA

INT

• FULL-SCALE ANALOG INPUT VOLTAGE

(Typ) = 200mV or 2V

lNFS

• INTEGRATE RESIST O R

INT

-----------------=

INFS

INT

• INTEGRATE CAPACITOR

()I

INT

--------------------------------=

INT

• INTEGRATOR OUTPUT VOLTAGE SWING

()I

INT

--------------------------------=

INT

> 50kΩ

OSC

lNT/t50Hz

()

INT

()

INT

)

= Integer

ICL7126

• DISPLAY COUNT

COUNT 1000

×=

---------------

REF

• CONVERSION CYCLE t

CYC

when f

= t = t

OSC

x 4000

CL0CK

x 16,000

OSC

= 48KHz; t

CYC

= 333ms

• COMMON MODE INPUT VOLTAGE (V- + 1V) < V

< (V+ - 0.5V)

• AUTO-ZERO CAPACITOR

0.01µF < C

< 1µF

• REFERENCE CAPACITOR

0.1µF < C

• V

COM

REF

< 1µF

Biased between V+ and V-

• V

≅ V+ - 2.8V

COM

Regulation lost when V+ to V- < ≅6.8V; If V the V

is externally pulled down to (V + to V -)/2,

COM

circuit will turn off

COM

• ICL7126 POWER SUPPLY: SINGLE 9V V+ - V- = 9V Digital supply is generated internally

≅ V+ - 4.5V

TEST

• ICL7126 DISPLAY: LCD Type: Direct drive with digital logic supply amplitude

•V

MAXIMUM SWING:

INT

(V- + 0.5V) < V

< (V+ - 0.5V), V

INT

(Typ) = 2V

INT

Typical Integrator Amplifier Output Waveform (INT Pin)

AUTO ZERO PHASE

(COUNTS) 2999 - 1000

SIGNAL INTEGRATE

PHASE FIXED 1000 COUNTS

TOTAL CONVERSION TIME = 4000 x t

CLOCK

DE-INTEGRATE PHASE

0 - 1999 COUNTS

= 16,000 x t

OSC

FN3084.5

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