The HV400MJ/883 is a single monolithic, non-inverting high
current driver designed to drive large capacitive loads at high
slew rates. The device is optimized for driving single or parallel connected N-Channel power MOSFETs with total gate
charge from 5nC to >1000nC. It features two output stages
pinned out separately allowing independent control of the
MOSFET gate rise and fall times. The current sourcing output
stage is an NPN capable of 6A. An SCR provides over 30A of
current sinking. The HV400MJ/883 achieves rise and fall
times of 54ns and 16ns respectively driving a 10,000pF load.
Special features are included in this part to provide a simple,
high speed gate drive circuit for power MOSFETs. The
HV400MJ/883 requires no quiescent supply current, however, the input current is approximately 15mA while in the
high state. With the internal current steering diodes (Pin 7)
and an external capacitor, both the timing and MOSFET gate
power come from the same pulse transformer; no special
external supply is required for high side switches. No high
voltage diode is required to charge the bootstrap capacitor.
The HV400MJ/883 in combination with the MOSFET and
pulse transformer makes an isolated power switch building
block for applications such as high side switches, secondary
side regulation and synchronous rectification. The
HV400MJ/883 is also suitable for driving IGBTs, MCTs,
BJTs and small GTOs.
The HV400MJ/883 is a type of buffer; it does not have input
logic level switching threshold voltages. This single stage
design achieves propagation delays of 20ns. The output
NPN begins to source current when the voltage on Pin 2 is
approximately 2V more positive than the voltage at Pin 8.
The output SCR switches on when the input Pin 2 is 1V
more negative than the voltage at Pins 3/6. Due to the use of
the SCR for current sinking, once the output switches low,
the input must not go high again until all the internal SCR
charge has dissipated, 0.5µs - 1.5µs later.
Pinout
HV400MJ/883 (SBDIP)
TOP VIEW
V+ SUPPLY
SINK OUTPUT
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Tested at: Supply Voltage = +15V, Unless Otherwise Specified
Peak Output CurrentI
Peak Output CurrentI
Diode (Pin 7) Stored ChargeQ
Rise Timet
Fall Timet
Delay Time (Lo to Hi)t
Delay Time (Hi to Lo)t
Minimum Off Timet
IHP
OP8
OP6
RR
r
f
DR
DF
OR
I
SOURCE
V
VIN = 9V, 1µs Pulse, V
VIN = 9V, 1µs Pulse, V
= 6A, 1µs Pulse, VIN = 9V,
= 0V
OUT
25500900mA
= 02548A
OUT
= 0252535A
OUT
ID = 100mA2567nC
See Switching Diagram and Test Circuit253762ns
See Switching Diagram and Test Circuit251421ns
See Switching Diagram and Test Circuit25613ns
See Switching Diagram and Test Circuit25716ns
See Switching Diagram and Test Circuit254001140ns
NOTE:
2. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested at final production. These parameters are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization
based upon data from multiple production runs which reflect lot to lot and within lot variation.
TABLE 4. ELECTRICAL TEST REQUIREMENTS
MIL-STD-883 TEST REQUIREMENTSSUBGROUPS (SEE TABLES 1 AND 2)
Interim Electrical Parameters (Pre Burn-In)1
Final Electrical Test Parameters1 (Note 3), 2
Group A Test Requirements1, 2
Groups C and D Endpoints1
NOTE:
3. PDA applies to Subgroup 1 only. No other subgroups are included in PDA.
3
HV400MJ/883
Test Descriptions
SYMBOLDESCRIPTION
DC INPUT PARAMETERS
V
V
I
IH
IL
I
IH
IHP
I
IL
The differential voltage between the input (pin 2) to the output (pin 8) required to source 10mA
The differential voltage between the input (pin 2) to the output (pins 3, 6) required to sink 3mA
The current required to maintain the input (pin 2) high with I
The input (pin 2) current for a given pulsed output current
The current require to maintain the input (pin 2) low
DC OUTPUT PARAMETERS
V
I
OP8
I
OL
V
I
OP6
I
OH
V
I
Q
OH
OL
F
R
RR
The output (pin 8) voltage with input (pin 2) = V+
The pulsed peak source current form output (pin 8)
The output (pin 8) leakage current with the input (pin 2) = Ground
The output (pins 3, 6) voltage with the input (pin 2) = Ground
The pulsed peak sink current into output (pins 3, 6)
The output (pins 3, 6) leakage current with the input (pin 2) = V+
The forward voltage of diode D1 or D7
The reverse leakage current of diode D1 or D7
The time integral of the reverse current at turn off
AC PARAMETERS (See Switching Time Specifications)
OUT
= 0A
T
R
T
F
T
DR
T
DF
T
OR
The low to high transition of the output
The high to low transition of the output
The output propagation delay from the input (pin 2) rising edge
The output propagation delay from the input (pin 2) falling edge
The minimum time required after an output high to low transition before the next input low to high transition
4
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