Intersil Corporation HUF76113SK8 Datasheet
HUF76113SK8
Data Sheet October 1999 File Number 4448.2
6.5A, 30V, 0.030 Ohm, N-Channel, Logic
Level UltraFET Power MOSFET
This N-Channel power MOSFET is
manufactured using the innov ative
UltraFET™ process. This advanced
process technology achieves the
lowest possible on-resistance per silicon area, resulting in
outstanding performance. This device is capable of
withstanding high energy in the avalanche mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in applications where po w er
efficiency is important, such as switching regulators, switching
converters, motor drivers, rela y driv ers , low-voltage bus
switches, and power management in portable and batteryoperated products.
Formerly developmental type TA76113.
Ordering Information
PART NUMBER PACKAGE BRAND
HUF76113SK8 MS-012AA 76113SK8
NOTE: Whenordering, use the entire part number. Add the suffix T
to obtain the variant in tape and reel, e.g., HUF76113SK8T.
Features
• Logic Level Gate Drive
• 6.5A, 30V
• Ultra Low On-Resistance, r
DS(ON)
= 0.030Ω
• Temperature Compensating PSPICE™ Model
• Temperature Compensating SABER Model
• Thermal Impedance SPICE Model
• Thermal Impedance SABER Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
NC(1)
SOURCE(2)
DRAIN(8)
DRAIN(7)
Packaging
JEDEC MS-012AA
BRANDING DASH
1
2
SOURCE(3)
GATE(4)
5
3
4
DRAIN(6)
DRAIN(5)
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
UltraFET™ is a trademark of Intersil Corporation. PSPICE™ is a trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207
| Copyright © Intersil Corporation 1999
HUF76113SK8
Absolute Maximum Ratings T
= 25oC, Unless Otherwise Specified
A
HUF76113SK8 UNITS
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
DGR
GS
30 V
30 V
±16 V
Drain Current
Continuous (TA= 25oC, VGS = 10V) (Figure 2) (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . I
Continuous (TA= 100oC, VGS = 5V) (Note 3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Continuous (TA= 100oC, VGS = 4.5V) (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
Power Dissipation (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
D
D
DM
ASB
D
Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
pkg
6.5
2.0
2.0
Figure 4
Figure 6
2.5
20
-55 to 150
300
260
A
A
A
W
mW/oC
o
C
o
C
o
C
NOTES:
1. TJ = 25oC to 125oC.
2. 50oC/W measured using FR-4 board with 0.76 in2 footprint at 10 seconds.
3. 177oC/W measured using FR-4 board with 0.0115 in2 footprint at 1000 seconds.
Electrical Specifications T
= 25oC, Unless Otherwise Specified
A
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage BV
Zero Gate Voltage Drain Current I
Gate to Source Leakage Current I
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage V
Drain to Source On Resistance r
THERMAL SPECIFICATIONS
Thermal Resistance Junction to Ambient R
SWITCHING SPECIFICATIONS (VGS = 4.5V)
Turn-On Time t
Turn-On Delay Time t
Rise Time t
Turn-Off Delay Time t
Fall Time t
Turn-Off Time t
DSSID
DSS
VDS = 25V, VGS = 0V - - 1 µA
VDS = 25V, VGS = 0V, TA = 150oC - - 250 µA
GSS
GS(TH)VGS
DS(ON)ID
VGS = ±16V - - ±100 nA
ID = 2.0A, VGS = 5V (Figure 9) - 0.031 0.038 Ω
ID = 2.0A, VGS = 4.5V (Figure 9) - 0.033 0.041 Ω
θJA
Pad Area = 0.76 in2 (Note 2) - - 50
Pad Area = 0.054 in2 (See TB337) - - 143
Pad Area = 0.0115 in2 (See TB337) - - 177
ON
VDD = 15V, ID≅ 2.0A, RL = 7.5Ω,
VGS= 4.5V, RGS = 15Ω
d(ON)
d(OFF)
OFF
(Figure 15)
r
f
= 250µA, VGS = 0V (Figure 12) 30 - - V
= VDS, ID = 250µA (Figure 11) 1 - 3 V
= 6.5A, VGS = 10V (Figures 9, 10) - 0.025 0.030 Ω
o
C/W
o
C/W
o
C/W
- - 100 ns
-16-ns
-50-ns
-28-ns
-34-ns
- - 91 ns
2
HUF76113SK8
Electrical Specifications T
= 25oC, Unless Otherwise Specified
A
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
SWITCHING SPECIFICATIONS (VGS = 10V)
Turn-On Time t
Turn-On Delay Time t
Rise Time t
Turn-Off Delay Time t
Fall Time t
Turn-Off Time t
GATE CHARGE SPECIFICATIONS
Total Gate Charge Q
Gate Charge at 5V Q
Threshold Gate Charge Q
Gate to Source Gate Charge Q
Gate to Drain “Miller” Charge Q
CAPACITANCE SPECIFICATIONS
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
ON
VDD = 15V, ID≅ 6.5A, RL = 2.31Ω,
VGS= 10V, RGS = 16Ω
d(ON)
d(OFF)
OFF
g(TOT)VGS
g(5)
g(TH)
ISS
(Figure 16)
r
f
VGS = 0V to 5V - 10 12 nC
VGS = 0V to 1V - 0.65 0.78 nC
gs
gd
VDS = 25V, VGS = 0V, f = 1MHz
(Figure 13)
OSS
RSS
= 0V to 10V VDD= 15V, ID≅ 2.0A,
RL = 7.5Ω
I
= 1.0mA
g(REF)
(Figures 14)
- - 59 ns
- 6.5 - ns
-33-ns
-45-ns
-40-ns
- - 126 ns
- 17.5 21 nC
- 1.10 - nC
- 5.40 - nC
- 585 - pF
- 327 - pF
-73-pF
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage V
Reverse Recovery Time t
Reverse Recovered Charge Q
Typical Performance Curves
1.2
1.0
0.8
0.6
0.4
0.2
POWER DISSIPATION MULTIPLIER
0
0 25 50 75 100 150
TA, AMBIENT TEMPERATURE (oC)
SD
rr
RR
ISD =6.5A - - 1.25 V
ISD = 2.0A 1.10 V
ISD = 2.0A, dISD/dt = 100A/µs--47ns
ISD = 2.0A, dISD/dt = 100A/µs--52nC
8
125
6
4
VGS= 4.5V, R
, DRAIN CURRENT (A)
2
D
I
0
25 50 75 100 125
VGS= 10V, R
= 177oC/W
JA
θ
TA, AMBIENT TEMPERATURE (oC)
JA
θ
= 50oC/W
150
FIGURE 1. NORMALIZED POWER DISSIPATION vs AMBIENT
TEMPERATURE
3
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
AMBIENT TEMPERATURE
Typical Performance Curves (Continued)
10
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
1
0.05
0.02
0.01
0.1
, NORMALIZED
JA
θ
Z
0.01
THERMAL IMPEDANCE
0.001
500
100
-5
10
VGS = 10V
-4
10
VGS = 5V
SINGLE PULSE
-3
10
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
HUF76113SK8
-2
10
-1
10
t, RECTANGULAR PULSE DURATION (s)
0
10
R
θ
P
DM
NOTES:
DUTY FACTOR: D = t1/t
PEAK TJ = PDM x Z
1
10
JA
θ
TC = 25oC
FOR TEMPERATURES
ABOVE 25
o
C DERATE PEAK
CURRENT AS FOLLOWS:
I = I
150 - T
25
= 50oC/W
JA
2
x R
10
125
t
1
t
2
+ T
JA
A
θ
2
A
3
10
10
, PEAK CURRENT (A)
TRANSCONDUCTANCE
DM
MAY LIMIT CURRENT
I
IN THIS REGION
1
-5
10
-4
10
-3
10
FIGURE 4. PEAK CURRENT CAPABILITY
500
100
10
, DRAIN CURRENT (A)
D
I
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
1
V
DS
DS(ON)
V
DSS(MAX)
10
, DRAIN TO SOURCE VOLTAGE (V)
TJ = MAX RATED
T
= 25oC
A
100µs
1ms
10ms
= 30V
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
-2
10
t, PULSE WIDTH (s)
1001
R
= 50oC/W
JA
θ
-1
10
100
10
0
10
If R = 0
tAV = (L)(IAS)/(1.3*RATED BV
If R ≠ 0
t
= (L/R)ln[(IAS*R)/(1.3*RATED BV
AV
1
10
2
10
- VDD)
DSS
DSS
STARTING TJ = 25oC
STARTING TJ = 150oC
, AVALANCHE CURRENT (A)
AS
I
1
0.01
0.1
1 10 100
tAV, TIME IN AVALANCHE (ms)
NOTE: Refer to Intersil Application Notes AN9321 and AN9322.
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
CAPABILITY
10
- VDD) +1]
3
4
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