manufactured using the innov ative
UltraFET process. This advanced
process technology achieves the
lowest possible on-resistance per silicon area, resulting in
outstanding performance. This device is capable of
withstanding high energy in the avalanche mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in applications where po w er
efficiency is important, such as switching regulators, switching
converters, motor drivers, rela y driv ers , low-voltage bus
switches, and power management in portable and batteryoperated products.
Formerly developmental type TA76113.
Ordering Information
PART NUMBERPACKAGEBRAND
HUF76113DK8MS-012AA76113DK8
NOTE: When ordering, use the entire part number. Add the suffix T
to obtain the variant in tape and reel, e.g., HUF76113DK8T.
Features
• Logic Level Gate Drive
• 6A, 30V
• Ultra Low On-Resistance, r
• Temperature Compensating PSPICE
• Temperature Compensating SABER
DS(ON)
= 0.032Ω
®
Model
™
Model
• Thermal Impedance SPICE Model
• Thermal Impedance SABER Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D1(8)
D1(7)
S1(1)
G1(2)
Packaging
JEDEC MS-012AA
BRANDING DASH
1
2
D2(6)
D2(5)
S2(3)
G2(4)
5
3
4
1
UltraFET® is a registered trademark of Intersil Corporation. PSPICE® is a registered trademark of MicroSim Corporation.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
pkg
6
1.8
1.7
Figure 4
Figure 6
2.5
0.02
-55 to 150
300
260
A
A
A
W
W/oC
o
C
o
C
o
C
NOTES:
1. TJ = 25oC to 125oC.
2. 50oC/W measured using FR-4 board at 1 second.
3. 228oC/W measured using FR-4 board with 0.006 in2 footprint at 1000 seconds.
Electrical SpecificationsT
=25oC, Unless Otherwise Specified
A
PARAMETERSYMBOLTEST CONDITIONSMINTYPMAXUNITS
OFF STATE SPECIFICATIONS
Drain to Source Breakdown VoltageBV
Zero Gate Voltage Drain CurrentI
Gate to Source Leakage CurrentI
ON STATE SPECIFICATIONS
Gate to Source Threshold VoltageV
Drain to Source On Resistancer