Intersil Corporation HUF76113DK8 Datasheet

TM
HUF76113DK8
Data Sheet June 2000 File Number 4387.5
6A, 30V, 0.032 Ohm, Dual N-Channel, Logic Level UltraFET Power MOSFET
®
manufactured using the innov ative UltraFET process. This advanced
process technology achieves the lowest possible on-resistance per silicon area, resulting in outstanding performance. This device is capable of withstanding high energy in the avalanche mode and the diode exhibits very low reverse recovery time and stored charge. It was designed for use in applications where po w er efficiency is important, such as switching regulators, switching converters, motor drivers, rela y driv ers , low-voltage bus switches, and power management in portable and battery­operated products.
Formerly developmental type TA76113.
Ordering Information
PART NUMBER PACKAGE BRAND
HUF76113DK8 MS-012AA 76113DK8
NOTE: When ordering, use the entire part number. Add the suffix T to obtain the variant in tape and reel, e.g., HUF76113DK8T.
Features
• Logic Level Gate Drive
• 6A, 30V
• Ultra Low On-Resistance, r
• Temperature Compensating PSPICE
• Temperature Compensating SABER
DS(ON)
= 0.032
®
Model
Model
• Thermal Impedance SPICE Model
• Thermal Impedance SABER Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount Components to PC Boards”
Symbol
D1(8) D1(7)
S1(1)
G1(2)
Packaging
JEDEC MS-012AA
BRANDING DASH
1
2
D2(6) D2(5)
S2(3)
G2(4)
5
3
4
1
UltraFET® is a registered trademark of Intersil Corporation. PSPICE® is a registered trademark of MicroSim Corporation.
SABER™ is a trademark of Analogy, Inc. | 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 2000.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
HUF76113DK8
Absolute Maximum Ratings T
= 25oC, Unless Otherwise Specified
A
HUF76113DK8 UNITS
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
DGR
GS
30 V 30 V
±16 V
Drain Current
Continuous (TA= 25oC, VGS = 10V) (Figure 2) (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . I
Continuous (TA= 100oC, VGS = 5V) (Note 3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Continuous (TA= 100oC, VGS = 4.5V) (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
Power Dissipation (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D D D
DM
AS
D
Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
pkg
6
1.8
1.7
Figure 4
Figure 6
2.5
0.02
-55 to 150
300 260
A A A
W
W/oC
o
C
o
C
o
C
NOTES:
1. TJ = 25oC to 125oC.
2. 50oC/W measured using FR-4 board at 1 second.
3. 228oC/W measured using FR-4 board with 0.006 in2 footprint at 1000 seconds.
Electrical Specifications T
=25oC, Unless Otherwise Specified
A
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage BV Zero Gate Voltage Drain Current I
Gate to Source Leakage Current I
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage V Drain to Source On Resistance r
GS(TH)VGS
DS(ON)ID
THERMAL SPECIFICATIONS
Thermal Resistance Junction to Ambient R
SWITCHING SPECIFICATIONS (VGS = 4.5V) Turn-On Time t Turn-On Delay Time t
d(ON)
Rise Time t Turn-Off Delay Time t
d(OFF)
Fall Time t Turn-Off Time t
DSSID
DSS
GSS
θJA
ON
r
f
OFF
= 250µA, VGS = 0V (Figure 12) 30 - - V VDS = 25V, VGS = 0V - - 1 µA VDS = 25V, VGS = 0V, TC = 150oC - - 250 µA VGS = ±16V - - ±100 nA
= VDS, ID = 250µA (Figure 11) 1 - 3 V
= 6A, VGS = 10V (Figures 9, 10) - 0.026 0.032 ID = 1.8A, VGS = 5V (Figure 9) - 0.033 0.041 ID = 1.7A, VGS = 4.5V (Figure 9) - 0.035 0.043
Pad Area = 0.76 in2 (Note 2) - - 50 Pad Area = 0.027 in2 (See TB377) - - 191 Pad Area = 0.006 in2 (See TB377) - - 228
VDD = 15V, ID≅ 1.7A, RL = 8.8, VGS= 4.5V, RGS = 18Ω, (Figure 15)
- - 110 ns
-17-ns
o o o
C/W C/W C/W
-57-ns
-32-ns
-38-ns
- - 105 ns
2
HUF76113DK8
Electrical Specifications T
=25oC, Unless Otherwise Specified
A
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
SWITCHING SPECIFICATIONS (VGS = 10V)
Turn-On Time t Turn-On Delay Time t Rise Time t Turn-Off Delay Time t Fall Time t Turn-Off Time t
GATE CHARGE SPECIFICATIONS
Total Gate Charge Q Gate Charge at 5V Q Threshold Gate Charge Q Gate to Source Gate Charge Q Gate to Drain “Miller” Charge Q
CAPACITANCE SPECIFICATIONS
Input Capacitance C Output Capacitance C Reverse Transfer Capacitance C
ON
VDD= 15V, ID≅ 6A, RL= 2.5,VGS=10V, RGS = 18
d(ON)
d(OFF)
OFF
g(TOT)VGS
g(5)
g(TH)
ISS
(Figure 16)
r
f
VGS = 0V to 5V - 8.4 10.2 nC VGS = 0V to 1V - 0.55 0.66 nC
gs gd
VDS = 25V, VGS = 0V, f = 1MHz
OSS RSS
(Figure 13)
= 0V to 10V VDD = 15V, ID≅ 1.8A,
RL = 8.3 I
= 1.0mA
g(REF)
(Figure 14)
- - 60 ns
- 6.5 - ns
-33-ns
-50-ns
-40-ns
- - 135 ns
- 16.0 19.2 nC
- 1.50 - nC
- 3.90 - nC
- 605 - pF
- 275 - pF
-40-pF
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage V
Reverse Recovery Time t Reverse Recovered Charge Q
Typical Performance Curves
1.2
1.0
0.8
0.6
0.4
0.2
POWER DISSIPATION MULTIPLIER
0
0 25 50 75 100 150
TA, AMBIENT TEMPERATURE (oC)
SD
rr
RR
ISD = 6A - - 1.25 V ISD = 1.8A 1.00 V ISD = 1.8A, dISD/dt = 100A/µs--40ns ISD = 1.8A, dISD/dt = 100A/µs--42nC
7
125
6
5
4
3
2
, DRAIN CURRENT (A)
D
I
VGS= 4.5V, R
1
0
25 50 75 100 125 150
= 228oC/W
JA
θ
TA, AMBIENT TEMPERATURE (oC)
VGS= 10V, R
JA
θ
= 50oC/W
FIGURE 1. NORMALIZED POWERDISSIPATION vs AMBIENT
TEMPERATURE
3
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
AMBIENT TEMPERATURE
Typical Performance Curves (Continued)
2
DUTY CYCLE - DESCENDING ORDER
1
0.5
0.2
0.1
0.05
0.02
0.01
0.1
HUF76113DK8
R
= 228oC/W
JA
θ
P
DM
, NORMALIZED
JA
θ
0.01
Z
THERMAL IMPEDANCE
0.001
-5
10
500
100
VGS = 10V
10
, PEAK CURRENT (A)
DM
I
TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION
1
-5
10
SINGLE PULSE
-4
10
-3
10
-2
10
-1
10
0
10
t, RECTANGULAR PULSE DURATION (s)
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
R
= 228oC/W
JA
θ
VGS = 5V
-4
10
-3
10
-2
10
-1
10
0
10
t, PULSE WIDTH (s)
NOTES: DUTY FACTOR: D = t
PEAK TJ = PDM x Z
1
10
TC = 25oC
FOR TEMPERATURES ABOVE 25 CURRENT AS FOLLOWS:
I = I
25
1
10
t
1
t
2
1/t2
x R
JA
θ
o
+ T
JA
θ
2
10
C DERATE PEAK
150 - T
A
125
2
10
A
3
10
3
10
FIGURE 4. PEAK CURRENT CAPABILITY
500
100
OPERATION IN THIS
10
AREA MAY BE LIMITED BY r
, DRAIN CURRENT (A)
D
I
1
V
DS
DS(ON)
V
DSS(MAX)
10 1001
, DRAIN TO SOURCE VOLTAGE (V)
TJ = MAX RATED
T
A
= 30V
= 25oC
100µs
1ms
10ms
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
4
50
If R = 0 tAV = (L)(IAS)/(1.3*RATED BV
If R 0 tAV = (L/R)ln[(IAS*R)/(1.3*RATED BV
DSS
- VDD)
- VDD) +1]
DSS
STARTING TJ = 25oC
10
STARTING TJ = 150oC
, AVALANCHE CURRENT (A)
AS
I
1
0.1
1 10 100
tAV, TIME IN AVALANCHE (ms)
NOTE: Refer to Intersil Application Notes AN9321 and AN9322.
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
CAPABILITY
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