Intersil Corporation HUF75307D3, HUF75307D3S, HUF75307P3 Datasheet

HUF75307P3, HUF75307D3, HUF75307D3S

Data Sheet June 1999 File Number

15A, 55V, 0.090 Ohm, N-Channel UltraFET Power MOSFETs

These N-Channel powerMOSFETs are manufactured using the innovative UltraFET™ process.

This advanced process technology achieves the lowest possible on-resistance per silicon area, resulting in outstanding performance. This device is capable of withstanding high energy in the avalanche mode and the diode exhibits very low reverse recovery time and stored charge. It was designed for use in applications where power efﬁciency is important, such as switching regulators, switching converters, motor drivers, relay drivers, lowvoltage bus switches, and power management in portable and battery-operated products.

Formerly developmental type TA75307.

Ordering Information

PART NUMBER PACKAGE BRAND

HUF75307P3 TO-220AB 75307P HUF75307D3 TO-251AA 75307D HUF75307D3S TO-252AA 75307D

NOTE: Whenordering, use the entire part number. Add the suffix T to obtain the TO-252AA variant in tape and reel, e.g., HUF75307D3ST.

Features

• 15A, 55V

• Simulation Models

®

- Temperature Compensated PSPICE

and SABER

Models

- SPICE and SABER Thermal Impedance Models Available on the WEB at: www.semi.Intersil .com/families/models.htm

• Peak Current vs Pulse Width Curve

• UIS Rating Curve

• Related Literature

- TB334, “Guidelines for Soldering Surface Mount Components to PC Boards”

Symbol

D

G

S

4353.6

©

Packaging

DRAIN

(FLANGE)

JEDEC TO-220AB JEDEC TO-251AA

SOURCE

DRAIN

GATE

DRAIN

(FLANGE)

JEDEC TO-252AA

DRAIN (FLANGE)

GATE

SOURCE

DRAIN

GATE

4-40

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

UltraFET™ is a trademark of Intersil Corporation. PSPICE® is a trademark of MicroSim Corporation.

SABER is a Copyright of Analogy, Inc. http://www.intersil.com or 407-727-9207

HUF75307P3, HUF75307D3, HUF75307D3S

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

DSS

DGR

GS

55 V 55 V

±20 V

Drain Current

Continuous (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

D

DM

AS

D

Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, T

STG

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

L

pkg

15

Figure 4

Figures 6, 14, 15

45

0.3

-55 to 175

300 260

A

W

W/oC

o

C

o

C

o

C

NOTE:

1. TJ = 25oC to 150oC.

Electrical Speciﬁcations T

= 25oC, Unless Otherwise Speciﬁed

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

OFF STATE SPECIFICATIONS

Drain to Source Breakdown Voltage BV Zero Gate Voltage Drain Current I

DSSID

DSS

= 250µA, VGS = 0V (Figure 11) 55 - - V VDS = 50V, VGS = 0V - - 1 µA VDS = 45V, VGS = 0V, TC = 150oC - - 250 µA

Gate to Source Leakage Current I

GSS

VGS = ±20V - - ±100 nA

ON STATE SPECIFICATIONS

Gate to Source Threshold Voltage V Drain to Source On Resistance r

GS(TH)VGS

DS(ON)ID

= VDS, ID = 250µA (Figure 10) 2 - 4 V

= 15A, VGS = 10V (Figure 9) - 0.075 0.090 Ω

THERMAL SPECIFICATIONS

Thermal Resistance Junction to Case R Thermal Resistance Junction to Ambient R

θJC θJA

(Figure 3) - - 3.3 TO-220AB - - 62 TO-251AA, TO-252AA - - 100

o

C/W

o

C/W

o

C/W SWITCHING SPECIFICATIONS (VGS = 10V) Turn-On Time t Turn-On Delay Time t

d(ON)

Rise Time t Turn-Off Delay Time t

d(OFF)

Fall Time t Turn-Off Time t

ON

OFF

VDD = 30V, ID≅ 15A, RL = 2.0Ω, VGS= 10V, RGS = 100Ω

r

f

- - 60 ns

-7-ns

-40- ns

-35- ns

-45- ns

- - 100 ns

GATE CHARGE SPECIFICATIONS

Total Gate Charge Q Gate Charge at 10V Q Threshold Gate Charge Q Gate to Source Gate Charge Q Reverse Transfer Capacitance Q

g(TOT)VGS

g(10)

g(TH)

gs gd

= 0V to 20V VDD = 30V, VGS = 0V to 10V - 9 11 nC VGS = 0V to 2V - 0.6 0.8 nC

ID≅ 15A, RL = 2.0Ω I

= 1.0mA

g(REF)

(Figure13)

-1620nC

- 1.2 - nC

-4-nC

4-41

HUF75307P3, HUF75307D3, HUF75307D3S

Electrical Speciﬁcations T

= 25oC, Unless Otherwise Speciﬁed

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

CAPACITANCE SPECIFICATIONS

Input Capacitance C Output Capacitance C Reverse Transfer Capacitance C

Source to Drain Diode Speciﬁcations

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Source to Drain Diode Voltage V Reverse Recovery Time t Reverse Recovered Charge Q

Typical Performance Curves

1.2

1.0

0.8

ISS

OSS

RSS

SD

rr

RR

VDS = 25V, VGS = 0V, f = 1MHz (Figure 12)

- 250 - pF

- 100 - pF

-25-pF

ISD = 15A - - 1.25 V ISD = 15A, dISD/dt = 100A/µs--45ns ISD = 15A, dISD/dt = 100A/µs--55nC

20

15

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 25 50 75 100 150

TC, CASE TEMPERATURE (oC)

125 175

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE

2

DUTY CYCLE - DESCENDING ORDER

0.5

1

0.2

0.1

0.05

0.02

0.01

0.1

, NORMALIZED

θJC

Z

THERMAL IMPEDANCE

SINGLE PULSE

0.01

-5

10

-4

10

-3

10

t, RECTANGULAR PULSE DURATION (s)

10

, DRAIN CURRENT (A)

5

D

I

0

25

50 75 100 125 150 175

TC, CASE TEMPERATURE (oC)

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

P

DM

t

1

NOTES: DUTY FACTOR: D = t

PEAK TJ = PDM x Z

-2

10

-1

10

1/t2

x R

θJC

0

10

t

2

+ T

C

1

10

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

4-42

HUF75307P3, HUF75307D3, HUF75307D3S

Typical Performance Curves

200

100

VGS = 10V

, PEAK CURRENT (A)

DM

I

TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION

10

-5

10

100

10

-4

10

(Continued)

-3

10

t, PULSE WIDTH (s)

-2

10

FIGURE 4. PEAK CURRENT CAPABILITY

TJ = MAX RATED T

= 25oC

C

100µs

200 100

TC = 25oC

10

If R = 0 tAV = (L)(IAS)/(1.3*RATED BV

If R ≠ 0

= (L/R)ln[(IAS*R)/(1.3*RATED BV

t

AV

FOR TEMPERATURES ABOVE 25 CURRENT AS FOLLOWS:

I = I

25

-1

o

C DERATE PEAK

175 - T

C

150

0

10

- VDD)

DSS

- VDD) +1]

DSS

1

10

1ms

1

, DRAIN CURRENT (A)

D

I

OPERATION IN THIS AREA MAY BE LIMITED BY r

V

DSS(MAX)

0.1 1 200

DS(ON)

= 55V

10 100

, DRAIN TO SOURCE VOLTAGE (V)

V

DS

10ms

FIGURE 5. FORWARD BIAS SAFE OPERATING AREA

25

V

= 20V

GS

20

15

10

, DRAIN CURRENT (A)

D

I

5

0

12345

VDS, DRAIN TO SOURCE VOLTAGE (V)

VGS = 10V

VGS = 7V

PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX

= 25oC

T

C

VGS = 6V

VGS = 5V

10

, AVALANCHE CURRENT (A)

AS

I

1

0.001

STARTING TJ = 150oC

0.01 0.1 1 10 tAV, TIME IN AVALANCHE (ms)

STARTING TJ = 25oC

NOTE: Refer to Intersil Application Notes AN9321 and AN9322.

FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY

25

PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VDD = 15V

20

15

10

, DRAIN CURRENT (A)

D

I

5

0

1.5 3.0 4.5 6.0 7.50 VGS, GATE TO SOURCE VOLTAGE (V)

-55oC

25oC

175oC

FIGURE 7. SATURATION CHARACTERISTICS FIGURE 8. TRANSFER CHARACTERISTICS

4-43

HUF75307P3, HUF75307D3, HUF75307D3S

Typical Performance Curves

2.5

PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX V

= 10V, ID = 15A

GS

2.0

1.5

ON RESISTANCE

1.0

NORMALIZED DRAIN TO SOURCE

0.5

-40 0 40 80 120 160 200

-80 TJ, JUNCTION TEMPERATURE (oC)

(Continued)

FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

1.2 ID = 250µA

1.1

NORMALIZED GATE

1.2

1.0

0.8

THRESHOLD VOLTAGE

0.6

-40 0 40 80 120 160 200-80 TJ, JUNCTION TEMPERATURE (oC)

VGS = VDS, ID = 250µA

FIGURE 10. NORMALIZED GATETHRESHOLD VOLTAGEvs

JUNCTION TEMPERATURE

400

300

C

ISS

VGS = 0, f = 1MHz

= CGS + C

C C C

ISS RSS OSS

= C

≈ C

GD

DS

GD

+ C

GD

1.0

BREAKDOWN VOLTAGE

NORMALIZED DRAIN TO SOURCE

0.9

-40 0 40 80 120 160 200-80 T

, JUNCTION TEMPERATURE (oC)

J

FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

10

8

6

4

2

, GATE TO SOURCE VOLTAGE (V)

GS

V

0

2468100

Q

NOTE: Refer to Intersil Application Notes AN7254 and AN7260.

FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT

C, CAPACITANCE (pF)

FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

WAVEFORMS IN DESCENDING ORDER:

VDD = 30V

, GATE CHARGE (nC)

g

200

100

0

ID = 15A

= 12A

I

D

I

= 7.5A

D

I

= 4A

D

C

OSS

C

RSS

0

10 20 30 40 50 60

VDS, DRAIN TO SOURCE VOLTAGE (V)

4-44

HUF75307P3, HUF75307D3, HUF75307D3S

Test Circuits and Waveforms

V

DS

BV

DSS

L

VARY t

TO OBTAIN

P

REQUIRED PEAK I

V

GS

AS

R

G

+

V

DD

-

DUT

0V

P

I

AS

0.01Ω

0

t

FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS

V

I

G(REF)

DS

R

L

V

GS

+

V

DD

-

DUT

V

DD

VGS= 2V

0

I

g(REF)

0

V

GS

Q

g(TH)

Q

gs

t

P

I

AS

t

AV

Q

g(TOT)

V

DS

Q

g(10)

VGS = 10V

Q

gd

V

DS

V

DD

VGS= 20V

FIGURE 16. GATE CHARGE TEST CIRCUIT FIGURE 17. GATE CHARGE WAVEFORM

V

DS

R

L

V

GS

+

V

DD

-

V

DS

0

DUT

R

GS

V

GS

V

GS

10%

0

t

d(ON)

90%

t

ON

50%

t

10%

r

PULSE WIDTH

FIGURE 18. SWITCHING TIME TEST CIRCUIT FIGURE 19. RESISTIVE SWITCHING WAVEFORMS

4-45

t

d(OFF)

90%

t

OFF

50%

t

f

90%

10%