Intersil Corporation HS-82C54RH Datasheet

August 1995

HS-82C54RH

Radiation Hardened CMOS

Programmable Interval Timer

Features

• Radiation Hardened

- Total Dose > 10

- Transient Upset > 10

- Latch Up Free EPI-CMOS

- Functional After Total Dose 1 x 10

• Low Power Consumption

- IDDSB = 20µA

- IDDOP = 12mA

• Pin Compatible with NMOS 8254 and the Intersil 82C54

• High Speed, “No Wait State” Operation with 5MHz HS-80C86RH

• Three Independent 16-Bit Counters

• Six Programmable Counter Modes

• Binary or BCD Counting

• Status Read Back Command

• Hardened Field, Self-Aligned, Junction Isolated CMOS Process

• Single 5V Supply

• Military Temperature Range -55

RAD (Si)

RAD (Si)/sec

RAD (Si)

C to +125oC

Description

The Intersil HS-82C54RH is a high performance, radiation hardened CMOS version of the industry standard 8254 and is manufactured using a hardened ﬁeld, self-aligned silicon gate CMOS process. It has three independently programmable and functional 16-bit counters, each capable of handling clock input frequencies of up to 5MHz. Six programmable timer modes allow the HS-82C54RH to be used as an event counter, elapsed time indicator, a programmable one-shot, or for any other timing application. The high performance, radiation hardness, and industry standard conﬁguration of the HS-82C54RH make it compatible with the HS-80C86RH radiation hardened microprocessor.

Static CMOS circuit design insures low operating power. The Intersil hardened ﬁeld CMOS process results in performance equal to or greater than existing radiation resistant products at a fraction of the power.

Pinouts

24 LEAD CERAMIC DUAL-IN-LINE METAL SEAL

PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T24

TOP VIEW

CLK 0

OUT 0

GATE 0

GND

24 LEAD CERAMIC METAL SEAL FLATPACK

PACKAGE (FLATPACK) MIL-STD-1835 CDFP4-F24

TOP VIEW

D7 D6 D5 D4 D3 D2 D1

D0 CLK 0 OUT 0

GATE 0

GND

1 2 3 4 5 6 7 8 9 10 11 12

24 23 22 21 20 19 18 17 16 15 14 13

VDD WR RD CS A1 A0 CLK 2 OUT 2 GATE 2 CLK 1 GATE 1 OUT 1

VDD WR RD CS A1 A0 CLK 2 OUT 2 GATE 2 CLK 1 GATE 1 OUT1

Ordering Information

PART NUMBER TEMPERATURE RANGE PACKAGE

HS1-82C54RH-Q -55oC to +125oC 24 Lead SBDIP HS1-82C54RH-8 -55oC to +125oC 24 Lead SBDIP HS1-82C54RH-Sample +25oC 24 Lead SBDIP HS9-82C54RH-Q -55oC to +125oC 24 Lead Ceramic Flatpack HS9-82C54RH-8 -55oC to +125oC 24 Lead Ceramic Flatpack HS9-82C54RH/Sample +25oC 24 Lead Ceramic Flatpack HS9-82C54RH/Proto -55oC to +125oC 24 Lead Ceramic Flatpack

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207

948

DB NA

Spec Number 518059

File Number 3043.1

HS-82C54RH

Pin Description

SYMBOL

D7-D0 1-8 I/O DATA: Bi-directional three state data bus lines, connected to system data bus. CLK 0 9 I CLOCK 0: Clock input of Counter 0. OUT 0 10 O OUT 0: Output of Counter 0.

GATE 0 11 I GATE 0: Gate input of Counter 0.

GND 12 GROUND: Power supply connection.

OUT 1 13 O OUT 1: Output of Counter 1.

GATE 1 14 I GATE 1: Gate input of Counter 1.

CLK 1 15 I CLOCK 1: Clock input of Counter 1.

GATE 2 16 I GATE 2: Gate input of Counter 2.

OUT 2 17 O OUT 2: Output of Counter 2. CLK 2 18 I CLOCK 2: Clock input of Counter 2. A0, A1 19-20 I ADDRESS: Select inputs for one of the three counters or Control Word Register for read/write

CS 21 I CHIP SELECT: A low on this input enables the HS-82C54RH to respond toRD and WR signals.

RD 22 I READ: This input is low during CPU read operations.

WR 23 I WRITE: This input is low during CPU write operations.

VDD 24 VDD: The +5V power supply pin. A 0.1µF capacitor between pins 12 and 24 is recommended

NUMBER TYPE DESCRIPTION

operations. Normally connected to the system address bus.

A1 A0 Selects

0 0 Counter 0 0 1 Counter 1 1 0 Counter 2 1 1 Control Word Register

RD and WR are ignored otherwise.

for decoupling.

Functional Diagram

DATA

(8)

D7-D0

A0 A1

BUS

BUFFER

READ/ WRITE LOGIC

CONTROL

WORD

COUNTER

INTERNAL BUS

COUNTER

INTERNAL BUS

CLK 0

GATE 0 OUT 0

CLK 1 GATE 1 OUT 1

CLK 2 GATE 2 OUT 2

CONTROL

WORD

CONTROL

LOGIC

GATE N

CLK N

OUT N

STATUS

LATCH

STATUS

CRM CRL

OLM OLL

Spec Number 518059

949

Speciﬁcations HS-82C54RH

Absolute Maximum Ratings Reliability Information

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+7.0V

Input or Output Voltage

Applied for all Grades. . . . . . . . . . . . . . . . . .VSS-0.3V to VDD+0.3V

Storage Temperature Range . . . . . . . . . . . . . . . . . -65oC to +150oC

Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC

Lead Temperature (Soldering 10s). . . . . . . . . . . . . . . . . . . . +300oC

Typical Derating Factor. . . . . . . . . . .2.4mA/MHz Increase in IDDOP

ESD Classiﬁcation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

Operating Conditions

Operating Voltage Range. . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V

Operating Temperature Range. . . . . . . . . . . . . . . . -55oC to +125oC

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS

Thermal Resistance θ

SBDIP Package. . . . . . . . . . . . . . . . . . . . 40oC/W 6oC/W

Ceramic Flatpack Package . . . . . . . . . . . 60oC/W 4oC/W

Maximum Package Power Dissipation at +125oC Ambient

SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.25W

Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.83W

If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate:

SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25.0mW/C

Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . .16.7mW/C

Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . .0V to +0.8V

Input High Voltage (VIH). . . . . . . . . . . . . . . . . . . VDD -1.5V to VDD

PARAMETER SYMBOL CONDITIONS

TTL Output High Current IOH1 VDD = 4.5V, VO = 3.0V,

VIN = 0V or 4.5V

CMOST Output High Current

Output Low Current IOL VDD = 4.5V, VO = 0.4V,

Input Leakage Current IIL or IIH VDD = 5.5V, VIN = 0V or 5.5V

Output Leakage Current IOZL or

Standby Power Supply Current

Operating Power Supply Current

Functional Tests FT VDD = 4.5V and 5.5V,

Noise Immunity Functional Test

IOH2 VDD = 4.5V, VO = 4.1V,

VIN = 0V or 4.5V

Pins: 9, 11, 14-16, 18-23 VDD = 5.5V, VIN = 0V or 5.5V

IOZH

IDDSB VDD = 5.5V, VIN = GND or VDD

IDDOP VDD = 5.5V, VIN = GND or VDD

FN VDD = 5.5V, VIN = GND or

Pins: 1-8

IO = 0mA, Counters Programmed

IO = 0mA, CLK0 = CLK1 = CLK2 = 5MHz

VIN = GND or VDD, f = 1MHz

VDD - 1.5 and VDD = 4.5V, VIN = 0.8V or VDD

GROUP A

SUBGROUPS TEMPERATURE

1, 2, 3 -55oC, +25oC,

+125oC

1, 2, 3 -55oC, +25oC,

+125oC

1, 2, 3 -55oC, +25oC,

+125oC

1, 2, 3 -55oC, +25oC,

+125oC

1, 2, 3 -55oC, +25oC,

+125oC

1, 2, 3 -55oC, +25oC,

+125oC

1, 2, 3 -55oC, +25oC,

+125oC

7, 8A, 8B -55oC, +25oC,

+125oC

7, 8A, 8B -55oC, +25oC,

+125oC

LIMITS

UNITSMIN MAX

-2.5 - mA

-100 - µA

2.5 - mA

-1.0 1.0 µA

-10 10 µA

- 20.0 µA

- 12.0 mA

-- -

TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS

AC’s Tested at Worst Case VDD (s), Guaranteed Over Full Operating Range.

GROUP A

PARAMETER SYMBOL CONDITIONS

Address Stable Before RD TAVRL VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC75 - ns CS Stable Before RD TSLRL VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC0 - ns Address Hold Time After RD TRHAX VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC0 - ns RD Pulse Width TRLRH VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC 240 - ns Data Delay from RD TRLDV VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC - 200 ns

SUBGROUPS TEMPERATURE

LIMITS

UNITSMIN MAX

Spec Number 518059

950

Speciﬁcations HS-82C54RH

TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)

AC’s Tested at Worst Case VDD (s), Guaranteed Over Full Operating Range.

GROUP A

PARAMETER SYMBOL CONDITIONS

Command Recovery Time TRHRL VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC 320 - ns WRITE CYCLE Address Stable Before WR TAVWL VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC0 - ns CS Stable Before WR TSLWL VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC0 - ns Address Hold Time After WR TWHAX VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC0 - ns WR Pulse Width TWLWH VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC 240 - ns Data Setup Time Before WR TDVWH VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC 225 - ns Data Hold Time After WR TWHDX VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC35 - ns Command Recovery Time TWHWL VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC 320 - ns CLOCK AND GATE Clock Period TCLCL VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC 200 - ns High Pulse Width TCHCL VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC 100 - ns Low Pulse Width TCLCH VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC 100 - ns Gate Width High TGHGL VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC80 - ns Gate Width Low TGLGH VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC80 - ns Gate Setup Time to CLK TGVCH VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC80 - ns Gate Hold Time After CLK TCHGX VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC80 - ns Output Delay from CLK TCLOV VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC - 240 ns Output Delay from Gate TGLOV VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC - 200 ns Data Delay from Address Read TAVAV VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC - 275 ns Output Delay from WR High TWHOV VDD = 4.5V 9, 10, 11 -55oC, +25oC, +125oC - 260 ns

SUBGROUPS TEMPERATURE

LIMITS

UNITSMIN MAX

TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS

LIMITS

PARAMETER SYMBOL CONDITIONS TEMPERATURE

Input Capacitance CIN VDD = Open, f = 1MHz,

All measurements referenced to device ground.

Output Capacitance COUT VDD = Open, f = 1MHz,

All measurements referenced to device ground.

I/O Capacitance COUT VDD = Open, f = 1MHz,

All measurements referenced to device ground. TIMING REQUIREMENTS RD/ to Data Float TRHDZ VDD = 4.5V and 5.5V -55oC < TA < +125oC 8 145 ns TIMING RESPONSES Clock Rise Time TCH1CH2 VDD = 4.5V and 5.5V, 1.0V to 3.5V -55oC < TA < +125oC - 25 ns Clock Fall Time TCL1CL2 VDD = 4.5V and 5.5V, 3.5V to 1.0V -55oC < TA < +125oC - 25 ns

NOTE: The parameters listed are controlled via design or process parameters and are not directly tested. These parameters are character-

ized upon initial design release and upon design changes which would affect these characteristics.

TA = +25oC - 15 pF

TA = +25oC - 20 pF

UNITSMIN MAX

Spec Number 518059

951

Speciﬁcations HS-82C54RH

TABLE 4. POST 100K RAD ELECTRICAL PERFORMANCE CHARACTERISTICS

NOTE: See +25oC limits in Table 1 and Table 2 for Post RAD limits (Sub Groups 1, 7 and 9).

TABLE 5. BURN-IN DELTA PARAMETERS (+25oC)

PARAMETER SYMBOL DELTA LIMITS

Standby Power Supply Current IDDSB ±2µA Output Leakage Current IOZL, IOZH ±2µA Input Leakage Current IIH, IIL ±200nA Output Low Current IOL ±500µA or 10% of BBI Reading* TTL Output High Current IOH TTL ±500µA or 10% of BBI Reading* CMOS Output High Current IOH CMOS ±20µA or 10% of BBI Reading*

* Which ever is greater.

TABLE 6. APPLICABLE SUBGROUPS

GROUP A SUBGROUPS

CONFORMANCE

GROUP

Initial Test 100% 5004 1, 7, 9 1 (Note 2) 1, 7, 9 Interim Test 100% 5004 1, 7, 9,∆ 1, ∆ (Note 2) 1, 7, 9 PDA 100% 5004 1, 7, ∆ - 1, 7 Final Test 100% 5004 2, 3, 8A, 8B, 10, 11 - 2, 3, 8A, 8B, 10, 11 Group A (Note 1) Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11 - 1, 2, 3, 7, 8A, 8B, 9,

Subgroup B5 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, ∆ 1, 2, 3,∆ (Note 2) N/A Subgroup B6 Sample 5005 1, 7, 9 - N/A Group C Sample 5005 N/A N/A 1, 2, 3, 7, 8A, 8B, 9,

Group D Sample 5005 1, 7, 9 - 1, 7, 9 Group E, Subgroup 2 Sample 5005 1, 7, 9 - 1, 7, 9

NOTES:

1. Alternate Group A testing in accordance with MIL-STD-883 method 5005 may be exercised.

2. Table 5 parameters only

MIL-STD-883

METHOD

TESTED FOR -Q

RECORDED

FOR -Q TESTED FOR -8

10, 11

RECORDED

FOR -8

952

Spec Number 518059

HS-82C54RH

Intersil Space Level Product Flow -Q

Wafer Lot Acceptance (All Lots) Method 5007

(Includes SEM)

GAMMA Radiation Veriﬁcation (Each Wafer) Method 1019,

2 Samples/Wafer, 0 Rejects 100% Die Attach 100% Nondestructive Bond Pull, Method 2023 Sample - Wire Bond Pull Monitor, Method 2011 Sample - Die Shear Monitor, Method 2019 or 2027 100% Internal Visual Inspection, Method 2010, Condition A CSI and/or GSI PreCap (Note 6) 100% Temperature Cycle, Method 1010, Condition C,

10 Cycles 100% Constant Acceleration, Method 2001, Condition per

Method 5004 100% PIND, Method 2020, Condition A 100% External Visual 100% Serialization 100% Initial Electrical Test (T0) 100% Static Burn-In 1, Condition A or B, 72 Hours Min,

NOTES:

1. Failures from subgroup 1, 7 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the failures from subgroup 7.

2. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004.

3. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005.

4. Group B and D inspections are optional and will not be performed unless required by the P.O. When required, the P.O. should include separate line items for Group B Test, Group B Samples, Group D Test and Group D Samples.

5. Group D Generic Data, as deﬁned by MIL-I-38535, is optional and will not be supplied unless required by the P.O. When required, the P.O. should include a separate line item for Group D Generic Data. Generic data is not guaranteed to be available and is therefore not available in all cases.

6. CSI and/or GSI inspections are optional and will not be performed unless required by theP.O. When required, the P.O. should include separate line items for CSI PreCap inspection, CSI ﬁnal inspection, GSI PreCap inspection, and/or GSI ﬁnal inspection.

7. Data Package Contents:

• Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number , Lot Number, Quan-

tity).

• Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage.

• GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, T est Package used, Speciﬁcation Numbers, Test

• X-Ray report and ﬁlm. Includes penetrometer measurements.

• Screening, Electrical, and Group A attributes (Screening attributes begin after package seal).

• Lot Serial Number Sheet (Good units serial number and lot number).

• Variables Data (All Delta operations). Data is identiﬁed by serial number. Data header includes lot number and date of test.

• Group B and D attributes and/or Generic data is included when required by the P.O.

• The Certiﬁcate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certiﬁcate of Conformance is signed

C Min, Method 1015

+125

equipment, etc. Radiation Read and Record data on ﬁle at Intersil.

by an authorized Quality Representative.

100% Interim Electrical Test 1 (T1) 100% Delta Calculation (T0-T1) 100% PDA 1, Method 5004 (Note 1) 100% Dynamic Burn-In, Condition D, 240 Hours, +125

Equivalent, Method 1015 100% Interim Electrical Test 2(T2) 100% Delta Calculation (T0-T2) 100% PDA 2, Method 5004 (Note 1) 100% Final Electrical Test 100% Fine/Gross Leak, Method 1014 100% Radiographic (X-Ray), Method 2012 (Note 2) 100% External Visual, Method 2009 Sample - Group A, Method 5005 (Note 3) Sample - Group B, Method 5005 (Note 4) Sample - Group D, Method 5005 (Notes 4 and 5) 100% Data Package Generation (Note 7) CSI and/or GSI Final (Note 6)

C or

953

Spec Number 518059

HS-82C54RH

Intersil Space Level Product Flow -8

GAMMA Radiation Veriﬁcation (Each Wafer) Method 1019,

2 Samples/Wafer, 0 Rejects 100% Die Attach Periodic- Wire Bond Pull Monitor, Method 2011 Periodic- Die Shear Monitor, Method 2019 or 2027 100% Internal Visual Inspection, Method 2010, Condition B CSI an/or GSI PreCap (Note 5) 100% Temperature Cycle, Method 1010, Condition C,

10 Cycles 100% Constant Acceleration, Method 2001, Condition per

Method 5004 100% External Visual 100% Initial Electrical Test

NOTES:

1. Failures from subgroup 1, 7 are used for calculating PDA. The maximum allowable PDA = 5%.

2. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005.

3. Group B, C and D inspections are optional and will not be performed unless required by the P.O. When required, the P.O. should include separate line items for Group B Test, Group C Test, Group C Samples, Group D Test and Group D Samples.

4. Group C and/or Group D Generic Data, as deﬁned by MIL-I-38535, is optional and will not be supplied unless required by the P.O. When required, the P.O. should include a separate line item for Group C Generic Data and/or Group D Generic Data. Generic data is not guaranteed to be available and is therefore not available in all cases.

5. CSI and/or GSI inspections are optional and will not be performed unless required by theP.O. When required, the P.O. should include separate line items for CSI PreCap inspection, CSI ﬁnal inspection, GSI PreCap inspection, and/or GSI ﬁnal inspection.

6. Data Package Contents:

• Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number , Lot Number, Quan-

tity).

• GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, T est Package used, Speciﬁcation Numbers, Test

equipment, etc. Radiation Read and Record data on ﬁle at Intersil.

• Screening, Electrical, and Group A attributes (Screening attributes begin after package seal).

• Group B, C and D attributes and/or Generic data is included when required by the P.O.

• The Certiﬁcate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certiﬁcate of Conformance is signed

by an authorized Quality Representative.

100% Dynamic Burn-In, Condition D, 160 Hours, +125

Equivalent, Method 1015 100% Interim Electrical Test 100% PDA, Method 5004 (Note 1) 100% Final Electrical Test 100% Fine/Gross Leak, Method 1014 100% External Visual, Method 2009 Sample - Group A, Method 5005 (Note 2) Sample - Group B, Method 5005 (Note 3) Sample - Group C, Method 5005 (Notes 3 and 4) Sample - Group D, Method 5005 (Notes 3 and 4) 100% Data Package Generation (Note 6) CSI and/or GSI Final (Note 5)

C or

954

Spec Number 518059

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