Intersil Corporation HS-6617RH-T Datasheet
HS-6617RH-T
Data Sheet July 1999 File Number
Radiation Hardened 2K x 8 CMOS PROM
Intersil’sSatellite Applications FlowTM(SAF) devices are fully
tested and guaranteed to 100kRAD total dose. These QML
Class T devices are processed to a standard flow intended
to meet the cost and shorter lead-time needs of large
volume satellite manufacturers, while maintaining a high
level of reliability.
The Intersil HS-6617RH-T is a radiation hardened 16k
CMOS PROM, organized in a 2K word by 8-bit format. The
chip is manufactured using a radiation hardened CMOS
process, and is designed to be functionally equivalent to the
HM-6617. Synchronous circuit design techniques combine
with CMOS processing to give this device high speed
performance with very low power dissipation.
On chip address latches are provided, allowing easy
interfacing with recent generation microprocessors that use
multiplexed address/data bus structure, such as the
HS-80C86RH. The output enable control (
G) simplifies
microprocessor system interfacing by allowing output data
bus control, in addition to, the chip enable control.
Synchronous operation of the HS-6617RH-T is ideal for high
speed pipe-lined architecture systems and also in
synchronous logic replacement functions.
Specifications
Specifications for Rad Hard QML devices are controlled by
the Defense Supply Center in Columbus (DSCC). The SMD
numbers listed below must be used when ordering.
Detailed Electrical Specifications for the HS-6617RH-T
are contained in SMD 5962-95708. A “hot-link” is provided
from our website for downloading.
www.intersil.com/spacedefense/ne wsafc lasst.asp
Intersil’s Quality Management Plan (QM Plan), listing all
Class T screening operations, is also available on our
website.
www.intersil.com/quality/manuals.asp
Ordering Information
TEMP.
ORDERING
NUMBER PART NUMBER
5962R9570801TJC HS1-6617RH-T -55 to 125
HS1-6617RH/Proto HS1-6617RH/Proto -55 to 125
5962R9570801TXC HS9-6617RH-T -55 to 125
HS9-6617RH/Proto HS9-6617RH/Proto -55 to 125
NOTE:
Minimumorderquantity for -T is 150 units through
distribution, or 450 units direct.
RANGE
(oC)
Features
• QML Class T, Per MIL-PRF-38535
• Radiation Performance
5
- Gamma Dose (γ) 1 x 10
- SEU LET 16MeV/mg/cm
- SEL LET 100MeV/mg/cm
RAD(Si)
2
2
• Field Programmable Nicrome Fuse Links
• Low Standby Power 1.1mW Max
• Low Operating Power 137.5mW/MHz Max
• Fast Access Time 100ns Max
• TTL Compatible Inputs/Outputs
• Synchronous Operation
• On Chip Address Latches, Three-State Outputs
Pinouts
HS1-6617RH-T (SBDIP), CDIP2-T24
TOP VIEW
A7
1
A6
2
A5
3
A4
4
5
A3
6
A2
7
A1
A0
8
9
Q0
10
Q1
11
Q2
12
GND
HS9-6617RH-T (FLATPACK), CDFP4-F24
TOP VIEW
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
GND
† P must be hardwired at all times to V
1
2
3
4
5
6
7
8
9
10
11
12
programming.
24
V
DD
A8
23
22
A9
21
P
20
G
19
A10
18
E
Q7
17
16
Q6
15
Q5
Q4
14
13
Q3
24
23
22
21
20
19
18
17
16
15
14
13
, except during
DD
4608.1
V
DD
A8
A9
P †
G
A10
E
Q7
Q6
Q5
Q4
Q3
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
www.intersil.com or 407-727-9207
Satellite Applications Flow™ (SAF) is a trademark of Intersil Corporation.
| Copyright © Intersil Corporation 1999
Functional Diagram
MSB
A10
A9
A8
A7
A6
A5
A4
LSB
P
E
LATCHED
ADDRESS
REGISTER
HS-6617RH-T
7A
7
E
A
GATED
ROW
DECODER
E
128 x 128
MATRIX
128
1 OF 8
16
8
E
GATE COLUMN
DECODER
PROGRAMMING, AND DATA
OUTPUT CONTROL
A
4
16 16 161616 16 16
8
A
4
Q0 - Q7
G
ALL LINES POSITIVE LOGIC:
ACTIVE HIGH
THREE STATE BUFFERS:
A HIGH
Timing Waveform
ADDRESSES
E
G
DAT A
OUTPUT
Q0 - Q7
OUTPUT ACTIVE
1.5V 1.5V
ADDRESS
TAVEL
1.5V
TEHEL
E
MSB
ADDRESS LATCHES & GATED DECODERS:
LATCH ON FALLING EDGE OF E
GATE ON FALLING EDGE OF
P = HARDWIRED TO VDD EXCEPT DURING PROGRAMMING
TRUTH TABLE
E G MODE
0 0 Enabled
0 1 Output Disabled
1 X Disabled
TAVQV
VALID
TELEL
TELAX
TELEH
1.5V
TELQV
TGLQV
1.5V 1.5V
TGLQX
TELQX
LATCHED ADDRESS
REGISTER
A3 A2 A1 A0
G
VALID
DAT A
LSB
3.0V
VALID
ADDRESSES
0V
3.0V
1.5V1.5V
0V
TEHQZ
3.0V
0V
TGHQZ
TS
FIGURE 1. READ CYCLE
2
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