Intersil Corporation HS-3374RH Datasheet

March 1996
HS-3374RH
Radiation Hardened
8-Bit Bidirectional CMOS/TTL Level Converter
Features
• Devices QML Qualified in Accordance with MIL-PRF-38535
• Detailed Electrical and Screening Requirements are Contained in SMD# 5962-9XXXX and Intersil’ QM Plan
• Radiation Hardened EPI-CMOS
- Total Dose 1 x 10
- Latch-Up Immune > 1 x 10
5
RAD(Si)
12
RAD (Si)/s (Note 1)
• Low Propagation Delay Time
- Typical CMOS to TTL Pre-RAD 40ns
- Typical CMOS to TTL Post 100K RAD 40ns
- Typical TTL to CMOS Pre-RAD 50ns
- Typical TTL to CMOS Post 100K RAD 50ns
• Low Standby Power
• +10V CMOS and +5V TTL Power Supply Inputs
• Eight Non-inverting Three-State Input/Output Channels
• No External TTL Input Pull-Up Resistors Required
• High TTL Sink Current
• Equivalent to Sandia SA2996
o
• Military Temperature Range -55
C to +125oC
Description
The Intersil HS-3374RH is a radiation hardened 8-bit bidirectional level converter designed to interface CMOS logic levels with TTL logic levels in radiation hardened bus oriented systems. The HS-3374RH is fabricated using a radiation hardened EPI-CMOS process and features eight parallel bidirectional buffer/level converters.
Two control inputs, ENABLE and DISABLE, are used to deter­mine the direction of data flow, and to set both the in puts and outputs in the high impedance state. The control inputs may be driven by either TTL or CMOS logic drivers capable of sinking one standard TTL load.
The HS-3374RH is a non-inverting version of the industry standard CD40116. The non-inverting outputs of the HS-3374RH reduce PC board chip count by eliminating the need to restore data back to a non-inverted format.
NOTE:
1. For operation at 10V and transient le vels abo ve 1 x 1010 RAD (Si)/s, please refer to Application Note 401.
Pinout
MIL-STD-1835, CDIP2-T22
(SBDIP)
TOP VIEW
VDD
1
A0
2
A1
3
A2
4
A3
INPUT/OUTPUT
CMOS
ENABLE
A4 A5 A6 A7
GND
5 6 7 8
9 10 11
Functional Diagram
DISABLE 13
CMOS
IN/OUT
ENABLE 10
88
2-9
LEVEL
SHIFTER
22 21 20 19 18 17 16 15 14 13 12
VCC B0 B1 B2 B3
TTL INPUT/OUTPUT
B4 B5 B6 B7 DISABLE NC
VDD = 1 VCC = 22 GND = 11
14-21
TTL OUT (IN)
Ordering Information
PART NUMBER TEMPERA TURE RANGE SCREENING LEVEL PACKAGE
5962R9XXXX01QRC 5962R9XXXX01VRC HS1-3374 (SAMPLE)
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207
-55oC to +125oC
-55oC to +125oC +25oC
| Copyright © Intersil Corporation 1999
MIL-PRF-38535 Level Q MIL-PRF-38535 Level V
Sample
1
22 Lead SBDIP 22 Lead SBDIP 22 Lead SBDIP
Spec Number 518052
File Number 3038.1
Specifications HS-3374RH
Absolute Maximum Ratings Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+11.0V
I/O Voltage Applied. . . . . . . . . . . . . . . . . . . GND-0.3V to VDD+0.3V
Storage Temperature Range . . . . . . . . . . . . . . . . . -65oC to +150oC
Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
Lead Temperature (Soldering 10s). . . . . . . . . . . . . . . . . . . . +300oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Operating Voltage Range VDD . . . . . . . . . . . . . +9.5V to +10.5V
VCC . . . . . . . . . . . . +4.75V to +5.25V
Operating Temperature Range. . . . . . . . . . . . . . . . -55oC to +125oC
Input Voltage Range
Data Inputs (CMOS) . . . . . . . . . . . . . . . . . . .GND-0.3 to VDD+0.3
Data Inputs (TTL) . . . . . . . . . . . . . . . . . . . . .GND-0.3 to VCC+0.3
Enable, Disable Inputs . . . . . . . . . . . . . . . . .GND-0.3 to VDD+0.3
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
Thermal Resistance (Typical) θJA(oC/W) θJC (oC/W)
SBDIP Package. . . . . . . . . . . . . . . . . . 74.8 12.3
Maximum Package Power Dissipation at +125oC
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.67W
If Device Power Exceeds Package Dissipation Capability, Provide Heat Sinking or Derate Linearly at the Following Rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13.4mW/oC
Input Low Voltage (CMOS) . . . . . . . . . . . . . . . . . . . . . . . GND to 1V
Input High Voltage (CMOS). . . . . . . . . . . . . . . . . .VDD-1.0V to VDD
Input Low Voltage (TTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8V
Input High Voltage (TTL). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.8V
PARAMETER SYMBOL CONDITIONS
ENABLE AND DISABLE IINPUTS Input Leakage Current IIH CMOS VDD = 10.5V, VCC = 5.25V,
VIN = 10.5V, Floating Outputs TTL INPUT TO CMOS OUTPUTS Input Leakage Current IIL IIH VDD = 10.5V, VCC = 5.25V,
VIN = 0.8V, Other Inputs at 2.8V
VDD = 10.5V, VCC = 5.25V,
VIN = 2.8V, other Inputs = 0.8V High Level Output
Voltage
Low level output Voltage
CMOS to TTL OUTPUTS High Level Output
Voltage
VOH VDD = 9.5V, VCC = 4.75V,
VIH = 2.8V, VIL = 0.8V,
IOH = -2.0mA
VOL VDD = 10.5V, VCC = 5.25V,
VIH = 2.8V, VIL 0.8V,
IOL = 2.0mA
VOH VDD = 9.5, VCC = 4.75V,
VIH = 8.5V, VIL = 1.0V,
IOH = -2.0mA
GROUP A
SUBGROUPS TEMPERATURE
1, 2, 3 -55oC, +25oC,
+125oC
1, 2, 3 -55oC, +25oC,
+125oC
1, 2, 3 -55oC, +25oC,
+125oC
1, 2, 3 -55oC, +25oC,
+125oC
1, 2, 3 -55oC, +25oC,
+125oC
1, 2, 3 -55oC, +25oC,
+125oC
LIMITS
UNITSMIN MAX
-1µA
-1 - µA
-1µA
9- V
- 0.5 V
3- V
Low Level Output Voltage
Output Leakage Current
VOL VDD = 10.5V, VCC = 5.25V,
VIH = 9.5V, VIL = 1.0V,
IOL = 11mA
IOZL VDD = 10.5V, VCC = 5.25V,
VIN = 0V, All other pins high
IOZH VDD = 10.5V, VCC = 5.25V,
VIN = 2.8V, All other pins at
GND
1, 2, 3 -55oC, +25oC,
+125oC
1, 2, 3 -55oC, +25oC,
+125oC
1, 2, 3 -55oC, +25oC,
+125oC
- 0.4 V
-10 - µA
-10µA
Spec Number 518052
2
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