Intersil Corporation HS-303RH-T Datasheet
HS-303RH-T
Data Sheet July 1999 File Number
Radiation Hardened
CMOS Dual SPDT Analog Switch
Intersil’sSatellite Applications FlowTM(SAF) devices are fully
tested and guaranteed to 100kRAD Total Dose. These QML
Class T devices are processed to a standard flow intended
to meet the cost and shorter lead-time needs of large
volume satellite manufacturers, while maintaining a high
level of reliability.
The HS-303RH-T analog switch is a monolithic device
fabricated using Radiation Hardened CMOS technology and
the Intersil dielectric isolation process for latch-up free
operation. Improved total dose hardness is obtained by
layout (thin oxide tabs extending to a channel stop) and
processing (hardened gate oxide). This switch offers lowresistance switching performance for analog voltages up to
the supply rails. “ON” resistance is low and staysreasonably
constant overthe full range of operating voltageand current.
“ON” resistance also stays reasonably constant when
exposed to radiation, being typically 30Ω pre-rad and 35Ω
post 100kRAD(Si). Break-before-make switching is
controlled by 5V digital inputs.
Specifications
Specifications for Rad Hard QML devices are controlled by
the Defense Supply Center in Columbus (DSCC). The SMD
numbers listed below must be used when ordering.
Detailed Electrical Specifications for the HS-303RH-T
are contained in SMD 5962-95813. A “hot-link” is provided
from our website for downloading.
www.intersil.com/spacedefense/ne wsafc lasst.asp
4602.1
Features
• QML Class T, Per MIL-PRF-38535
• Radiation Performance
5
- Gamma Dose (γ) 1 x 10
RAD(Si)
• No Latch-Up, Dielectrically Isolated Device Islands
• Pin for Pin Compatible with Intersil HI-303 Series Analog
Switches
• Analog Signal Range 15V
• Low Leakage . . . . . . . . . . . . . . . . 100nA (Max, Post Rad)
•Low r
. . . . . . . . . . . . . . . . . . . . . . 60Ω (Max, Post Rad)
ON
• Low Operating Power. . . . . . . . . . 100µA (Max, Post Rad)
Pinouts
HS1-303RH-T (SBDIP), CDIP2-T14
TOP VIEW
1
NC
2
S3
3
D3
4
D1
5
S1
6
IN1
7
GND
HS9-303RH-T (FLATPACK) CDFP3-F14
TOP VIEW
14
V+
13
S4
12
D4
11
D2
10
S2
9
IN2
8
V-
Intersil’s Quality Management Plan (QM Plan), listing all
Class T screening operations, is also available on our
website.
www.intersil.com/quality/manuals.asp
Ordering Information
TEMP.
ORDERING
NUMBER
5962R9581301TCC HS1-303RH-T -55 to 125
5962R9581304TXC HS9-303RH-T -55 to 125
NOTE:
Minimumorderquantity for -T is 150 units through
distribution, or 450 units direct.
PART
NUMBER
1
RANGE
(oC)
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
NC
S3
D3
D1
S1
IN1
GND
www.intersil.com or 407-727-9207
Satellite Applications Flow™ (SAF) is a trademark of Intersil Corporation.
1
2
3
4
5
6
7
| Copyright © Intersil Corporation 1999
14
13
12
11
10
9
8
V+
S4
D4
D2
S2
IN2
V-
Functional Diagram
IN
Die Characteristics
N P
HS-303RH-T
SBDIP TRUTH TABLE
LOGIC SW1AND SW2 SW3 AND SW4
D
0 OFF ON
1 ON OFF
DIE DIMENSIONS:
(2130µm x 1930µm x 279µm ±25.4µm)
84 x 76 x 11mils ±1mil
METALLIZATION:
Type: Al
Thickness: 12.5k
Å ±2kÅ
SUBSTRATE POTENTIAL:
Unbiased (DI)
BACKSIDE FINISH:
Gold
Metallization Mask Layout
D3
HS-303RH-T
V+
S3
PASSIVATION:
Type: Silox (S
Thickness: 8k
)
iO2
Å ±1kÅ
WORST CASE CURRENT DENSITY:
< 2.0e5 A/cm
2
TRANSISTOR COUNT:
76
PROCESS:
Metal Gate CMOS, Dielectric Isolation
S4
D4
D1
S1
IN1
NC
V-
GND
D2
S2
IN2
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However ,no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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