Intersil Corporation HS-1212RH Datasheet

HS-1212RH

Data Sheet August 1999

Radiation Hardened, Dual, High Speed Low Power, Video Closed Loop Buffer

The HS-1212RH is a dual closed loop buffer featuring user programmable gain and high speed performance. Manufactured on Intersil’s proprietary complementary bipolar UHF-1 (DI bonded wafer) process, this device offers wide -3dB bandwidth of 340MHz, very fast slew rate, excellent gain ﬂatness and high output current. These devicesare QML approved and are processed and screened in full compliance with MIL-PRF-38535.

A unique feature of the pinout allows the user to select a voltage gain of +1, -1, or +2, without the use of any external components. Gain selection is accomplished via connections to the inputs, as described in the “Application Information” section. The result is a more ﬂexible product, fewerpart types in inventory, and more efﬁcient use of board space.

Compatibility with existing op amp pinouts provides ﬂexibility to upgrade low gain ampliﬁers, while decreasing component count. Unlike most buffers, the standard pinout provides an upgrade path should a higher closed loop gain be needed at a future date.

Speciﬁcations for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed here must be used when ordering.

Detailed Electrical Speciﬁcations for these devices are contained in SMD 5962-96831. A “hot-link” is provided on our homepage for downloading. www.intersil.com/spacedefense/space.asp

Ordering Information

INTERNAL

ORDERING NUMBER

5962F9683101VPA HS7-1212RH-Q -55 to 125 5962F9683101VPC HS7B-1212RH-Q -55 to 125

MKT. NUMBER

TEMP. RANGE

(oC)

File Number 4228.1

Features

• Electrically Screened to SMD # 5962-96831

• QML Qualiﬁed per MIL-PRF-38535 Requirements

• MIL-PRF-38535 Class V Compliant

• User Programmable For Closed-Loop Gains of +1, -1 or +2 Without Use of External Resistors

• Standard Operational Ampliﬁer Pinout

• Low Supply Current . . . . . . . . . . . . 5.9mA/Op Amp (Typ)

• Excellent Gain Accuracy . . . . . . . . . . . . . . . 0.99V/V (Typ)

• Wide -3dB Bandwidth. . . . . . . . . . . . . . . . . .340MHz (Typ)

• Fast Slew Rate. . . . . . . . . . . . . . . . . . . . . .1155V/µs (Typ)

• High Input Impedance . . . . . . . . . . . . . . . . . . . 1MΩ (Typ)

• Excellent Gain Flatness (to 50MHz). . . . . . ±0.02dB (Typ)

• Fast Overdrive Recovery . . . . . . . . . . . . . . . . <10ns (Typ)

• Total Gamma Dose. . . . . . . . . . . . . . . . . . . . 300kRAD(Si)

• Latch Up. . . . . . . . . . . . . . . . . . . . . None (DI Technology)

Applications

• Flash A/D Driver

• Video Switching and Routing

• Pulse and Video Ampliﬁers

• Wideband Ampliﬁers

• RF/IF Signal Processing

• Imaging Systems

Pinout

HS-1212RH (CERDIP) GDIP1-T8

HS-1212RH (SBDIP) CDIP2-T8

TOP VIEW

OUT1

-IN1

+IN1

V-

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

V+

OUT2

-IN2

+IN2

Application Information

HS-1212RH

HS-1212RH Advantages

The HS-1212RH features a novel design which allows the user to select from three closed loop gains, without any external components. The result is a more ﬂexible product, fewerpart types in inventory, and more efﬁcient use of board space. Implementing a dual, gain of 2, cable driver with this IC eliminates the four gain setting resistors, which frees up board space for termination resistors.

Like most newer high performance ampliﬁers, the HS-1212RH is a current feedback ampliﬁer (CFA). CFAs offer high bandwidth and slew rate at low supply currents, but can be difﬁcult to use because of their sensitivity to feedback capacitance and parasitics on the inverting input (summing node). The HS-1212RH eliminates these concerns by bringing the gain setting resistors on-chip. This yields the optimum placement and value of the feedback resistor, while minimizing feedback and summing node parasitics.Because there is no access to the summing node, the PCB parasitics do not impact performance at gains of +2 or -1 (see “Unity Gain Considerations” for discussion of parasitic impact on unity gain performance).

The HS-1212RH’s closed loop gain implementation provides better gain accuracy, lower offset and output impedance, and better distortion compared with open loop buffers.

Closed Loop Gain Selection

This “buffer” operates in closed loop gains of -1, +1, or +2, with gain selection accomplished via connections to the inputs. Applying the input signal to +IN and floating -IN selects a gain of +1 (see next section for la y out ca v eats), while g rounding -IN selects a gain of +2. A gain of -1 is obtained by applying the input signal to -IN with +IN grounded through a 50Ω resistor.

The table below summarizes these connections:

GAIN (ACL)

-1 50Ω to GND Input

+1 Input NC (Floating) +2 Input GND

+INPUT -INPUT

CONNECTIONS

Unity Gain Considerations

Unity gain selection is accomplished by ﬂoating the -Input of the HS-1212RH. Anything that tends to short the -Input to GND, such as stray capacitance at high frequencies, will cause the ampliﬁer gain to increase toward a gain of +2. The result is excessive high frequency peaking, and possible instability. Even the minimal amount of capacitance associated with attaching the -Input lead to the PCB results in approximately 6dB of gain peaking. At a minimum this requires due care to ensure the minimum capacitance at the

-Input connection.

Table 1 lists five alternate methods for configuring the HS-1212RH as a unity gain buffer, and the corresponding performance. The implementations vary in complexity and involve performance trade-offs. The easiest approach to implement is simply shorting the two input pins together, and applying the input signal to this common node. The amplifier bandwidth decreases from 430MHz to 280MHz, but excellent gain flatness is the benefit. A drawback to this approach is that the amplifier input noise voltage and input offset voltage terms see a gain of +2, resulting in higher noise and output offset voltages. Alternately, a 100pF capacitor between the inputs shorts them only at high frequencies, which prevents the increased output offset voltage but delivers less gain flatness.

Another straightforward approach is to add a 620Ω resistor in series with the ampliﬁer’s positive input. This resistor and the HS-1212RH input capacitance form a low pass ﬁlter which rolls off the signal bandwidth before gain peaking occurs. This conﬁguration was employed to obtain the data sheet AC and transient parameters for a gain of +1.

Pulse Overshoot

The HS-1212RH utilizes a quasi-complementary output stage to achieve high output current while minimizing quiescent supply current. In this approach, a composite device replaces the traditional PNP pulldown transistor . The composite device switches modes after crossing 0V, resulting in added distortion forsignals swinging below ground, and an increased overshoot on the negative portion of the output wavef orm (see Figure 6, Figure 9, and Figure 12). This overshoot isn’t present for small bipolar signals (see Figure 4, Figure 7, and Figure 10) or large positive signals (see Figure 5, Figure 8 and Figure 11).

PC Board Layout

This ampliﬁer’s frequency response depends greatly on the care taken in designing the PC board (PCB). The use of low

inductance components such as chip resistors and chip capacitors is strongly recommended, while a solid ground plane is a must!

Attention should be given to decoupling the power supplies. A large value (10µF) tantalum in parallel with a small value (0.1µF) chip capacitor works well in most cases.

HS-1212RH

TABLE 1. UNITY GAIN PERFORMANCE FOR VARIOUS IMPLEMENTATIONS

APPROACH PEAKING (dB) BW (MHz) ±0.1dB GAIN FLATNESS (MHz)

Remove -IN Pin 4.5 430 21 +RS= 620Ω 0 220 27 +RS= 620Ω and Remove -IN Pin 0.5 215 15 Short +IN to -IN (e.g., Pins 2 and 3) 0.6 280 70 100pF Capacitor Between +IN and -IN 0.7 290 40

Terminated microstrip signal lines are recommended at the input and output of the device. Capacitance directly on the output must be minimized, or isolated as discussed in the next section.

An example of a good high frequency layout is the Evaluation Board shown in Figure 3.

Driving Capacitive Loads

Capacitive loads, such as an A/D input, or an improperly terminated transmission line will degrade the ampliﬁer’s phase margin resulting in frequency response peaking and possible oscillations. In most cases, the oscillation can be avoided by placing a resistor (R prior to the capacitance.

Figure 1 details starting points for the selection of this resistor. The points on the curve indicate the R combinations for the optimum bandwidth, stability, and settling time, but experimental ﬁne tuning is recommended. Picking a point above or to the right of the curve yields an overdampedresponse, while points below or left of the curve indicate areas of underdamped performance.

and CL form a low pass network at the output, thus

limiting system bandwidth well below the ampliﬁer bandwidth of 350MHz. By decreasing R illustrated in the curves), the maximum bandwidth is obtained without sacriﬁcing stability. In spite of this, bandwidth decreases as the load capacitance increases.

) in series with the output

as CL increases (as

and C

Evaluation Board

The performance of the HS-1212RH maybe evaluatedusing the HA5023 Evaluation Board, slightly modiﬁed as follows:

1. Remove the two feedback resistors, and leave the connections open.

2. a. For A resistors (R b. For A with 0Ω resistors to GND.

The modiﬁed schematic for ampliﬁer 1, and the board layout are shown in Figures 2 and 3.

To order evaluation boards (part number HA5023EVAL), please contact your local sales ofﬁce.

OUT

−5V 10µF 0.1µF

FIGURE 2. MODIFIED EVALUATION BOARD SCHEMATIC

= +1 evaluation,remove the gain setting

), and leave pins 2 and 6 ﬂoating.

= +2, replace the gain setting resistors (R1)

50Ω

(NOTE)

1 2 3 4

− +

8 7 6 5

GND

NOTE: R1=

OR 0Ω (A

0.1µF

∞ (A

+5V

10µF

GND

=+1)

=+2)

SERIES OUTPUT RESISTANCE (Ω)

0 100 200 300 400

FIGURE 1. RECOMMENDED SERIES RESISTOR vs LOAD

AV=+2

LOAD CAPACITANCE (pF)

CAPACITANCE

AV=+1

150 250 35050

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