Intersil Corporation HS-1120RH Datasheet

August 1996

HS-1120RH

Radiation Hardened, Ultra High Speed

Current Feedback Amplifier with Offset Adjust

Features

• Electrically Screened to SMD 5962F9675601VPA

• MIL-PRF-38535 Class V Compliant

• Low Distortion (HD3, 30MHz) . . . . . . . . . . -84dBc (Typ)

• Wide -3dB Bandwidth . . . . . . . . . . . . . . . 850MHz (Typ)

• Very High Slew Rate . . . . . . . . . . . . . . . 2300V/µs (Typ)

• Fast Settling (0.1%) . . . . . . . . . . . . . . . . . . . . 11ns (Typ)

• Excellent Gain Flatness (to 50MHz) . . . . . 0.05dB (Typ)

• High Output Current . . . . . . . . . . . . . . . . . . 65mA (Typ)

• Fast Overdrive Recovery. . . . . . . . . . . . . . . <10ns (Typ)

• Total Gamma Dose. . . . . . . . . . . . . . . . . . 300K RAD (Si)

• Latch Up . . . . . . . . . . . . . . . . . . . None (DI Technology)

Applications

• Video Switching and Routing

• Pulse and Video Amplifiers

• Wideband Amplifiers

• RF/IF Signal Processing

• Flash A/D Driver

Description

The HS-1120RH is a radiation hardened, high speed,
wideband, fast settling current feedback amplifier. These
devices are QML approved and are processed and screened
in full compliance with MIL-PRF-38535. Built with Intersil’
proprietary, complementary bipolar UHF-1 (DI bonded
wafer) process, it is the fastest monolithic amplifier available
from any semiconductor manufacturer.

The HS-1120RH’s wide bandwidth, fast settling
characteristic, and low output impedance, make this
amplifier ideal for driving fast A/D converters. Additionally, it
offers offset voltage nulling capabilities as described in the
“Offset Adjustment” section of this datasheet.

Component and composite video systems will also benefit
from this amplifier’s performance, as indicated by the excel­lent gain flatness, and 0.03%/0.05 Degree Differential
Gain/Phase specifications (R

Detailed electrical specifications are contained in SMD
5962F9675601VPA, available on the Intersil Website or
AnswerFAX systems (document #967560)

A Cross Reference Table is available on the Intersil Website
for conv ersion of Intersil Part Numbers to SMDs. The address
is (http://www.intersil.com/datasheets/smd/smd_xref.
html). SMD numbers must be used to order Radiation Hard­ened Products.

= 75Ω).

L

• Imaging Systems

Pinout

Ordering Information

PART NUMBER

5962F9675601VPA -55 to 125 8 Ld CERDIP GDIP1-T8
HFA1100IJ

(Sample)
HFA11XXEVAL Evaluation Board

HS-1120RH

MIL-STD-1835, GDIP1-T8

(CERDIP)

TOP VIEW

BAL

1
2

-IN

+IN

V-

-

+

3
4

TEMP.

RANGE (oC) PACKAGE PKG. NO.

-40 to 85 8 Ld CERDIP F8.3A

8

NC

7

V+

6

OUT

5

BAL

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

1

File Number 4101.1

HS-1120RH

Application Information

Optimum Feedback Resistor

The enclosed plots of inverting and non-inverting frequency
response illustrate the performance of the HS-1120RH in
various gains. Although the bandwidth dependency on
closed loop gain isn’t as severe as that of a v oltage feedback
amplifier, there can be an appreciable decrease in
bandwidth at higher gains. This decrease may be minimized
by taking advantage of the current feedback amplifier’s
unique relationship between bandwidth and R

. All current

F

feedback amplifiers require a feedback resistor, even for
unity gain applications, and R

, in conjunction with the

F

internal compensation capacitor, sets the dominant pole of
the frequency response. Thus, the amplifier’s bandwidth is
inversely proportional to R
optimized for a 510Ω R

. The HS-1120RH design is

F

at a gain of +1. Decreasing RF in a

F

unity gain application decreases stability, resulting in
excessive peaking and overshoot. At higher gains the
amplifier is more stable, so R

can be decreased in a trade-

F

off of stability for bandwidth.
The table below lists recommended R

values for various

F

gains, and the expected bandwidth.

GAIN
(ACL)R

-1 430 580
+1 510 850
+2 360 670
+5 150 520

[phone]
[phone]

F

(Ω)

BANDWIDTH

(MHz)

PC Board Layout

The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board. The

use of low inductance components such as chip resis­tors and chip capacitors is strongly recommended,
while a solid ground plane is a must!

Attention should be given to decoupling the power supplies.
A large value (10µF) tantalum in parallel with a small value
(0.1µF) chip capacitor works well in most cases.

Terminated microstrip signal lines are recommended at the
input and output of the device. Capacitance directly on the
output must be minimized, or isolated as discussed in the
next section.

Care must also be taken to minimize the capacitance to
ground seen by the amplifier’s inverting input (-IN). The
larger this capacitance, the worse the gain peaking, resulting
in pulse overshoot and possible instability. To this end, it is
recommended that the ground plane be removed under
traces connected to -IN, and connections to -IN should be
kept as short as possible.

An example of a good high frequency layout is the Evalua­tion Board shown in Figure 2.

Driving Capacitive Loads

Capacitive loads, such as an A/D input, or an improperly
terminated transmission line will degrade the amplifier’s
phase margin resulting in frequency response peaking and
possible oscillations. In most cases, the oscillation can be
avoided by placing a resistor (R

) in series with the output

S

prior to the capacitance.
Figure 1 details starting points for the selection of this resis-

tor. The points on the curve indicate the R

and CL combina-

S

tions for the optimum bandwidth, stability, and settling time,
but experimental fine tuning is recommended. Picking a
point above or to the right of the curve yields an overdamped
response, while points below or left of the curve indicate
areas of underdamped performance.

R

and CLform a low pass network at the output, thus

S

limiting system bandwidth well below the amplifier band­width of 850MHz. By decreasing R

as CLincreases (as

S

illustrated in the curves), the maximum bandwidth is
obtained without sacrificing stability. Even so, bandwidth
does decrease as you move to the right along the curve.
For example, at A

= +1, RS = 50Ω, CL = 30pF, the overall

V

bandwidth is limited to 300MHz, and bandwidth drops to
100MHz at A

50
45
40
35
30

(Ω)

25

S

R

20
15
10

5

AV = +2

0

0 40 80 120 160 200 240 280 320 360 400

FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs

= +1, RS = 5Ω, CL = 340pF.

V

AV = +1

LOAD CAPACITANCE (pF)

LOAD CAPACITANCE

Evaluation Board

The performance of the HS-1120RH may be evaluated using
the HFA11XXEVAL Evaluation Board.

The layout and schematic of the board are shown in
Figure 2. To order evaluation boards, please contact your
local sales office.

Offset Adjustment

The output offset voltage of the HS-1120RH may be nulled via
connections to the BAL pins. Unlike a voltage feedback
amplifier, offset adjustment is accomplished by varying the sign
and/or magnitude of the inverting input bias current (-I
With voltage feedback amplifiers, bias currents are matched
and bias current induced offset errors are nulled by matching
the impedances seen at the positive and negative inputs. Bias

BIAS

).

2

HS-1120RH

currents are uncorrelated on current feedback amplifiers, so
this technique is inappropriate.

flows through RFcausing an output offset error.

-I

BIAS

Likewise, any change in -I

forces a corresponding

BIAS

change in output voltage, providing the capability for output
offset adjustment. By nulling -I

to zero, the offset error

BIAS

due to this current is eliminated. In addition, an adjustment
limit greater than the -I
contributions from other error sources, such as V

limit allows the user to null the

BIAS

500 500
R

1

50Ω

IN

10µF

0.1µF

, or +IN

IO

1
2
3
4

-5V

FIGURE 2A. SCHEMATIC

source impedance. For example, the excess adjust current
of 50µA [I

ADJ (Min) - I

BN

an additional 26mV of output offset error (with R

(Max)] allows for the nulling of

BSN

= 510Ω) at

F

room temperature. The amount of adjustment is a function of
R

, so adjust range increases with increased RF. If allowed

F

by other considerations, such as bandwidth and noise, R
can be increased to provide more adjustment range.

The recommended offset adjustment circuit is shown in
Figure 3.

V

H

GND

8

0.1µF

7

50Ω

6
5

GND

OUT
V

L

10µF

+5V

F

V

H

1

+IN

OUT

V

L

V+

V-

GND

FIGURE 2B. TOP LAYOUT FIGURE 2C. BOTTOM LAYOUT

FIGURE 2. EVALUATION BOARD SCHEMATIC AND LAYOUT

510

2

-

HS-1120RH

V

IN

3

+

4

1

10K

6

5

V

OUT

V-

FIGURE 3. OFFSET VOLTAGE ADJUSTMENT CIRCUIT

3

Typical Performance Characteristics

HS-1120RH

Device Characterized at: V

= ±5V, RF = 360Ω, AV = +2V/V, RL = 100Ω, Unless Otherwise Specified

SUPPLY

PARAMETERS CONDITIONS TEMPERATURE TYPICAL UNITS

Input Offset Voltage (Note 1) V
Average Offset Voltage Drift Versus Temperature Full 10 µV/

CMRR ∆VCM = ±2V +25oC46dB

V

IO

V

PSRR ∆VS = ±1.25V +25oC50dB

IO

+Input Current (Note 1) V
Average +Input Current Drift Versus Temperature Full 40 nA/

-Input Current (Note 1) V
Average -Input Current Drift Versus Temperature Full 40 nA/

-Input Current Adjust Range V
+Input Resistance ∆V

-Input Resistance +25
Input Capacitance +25
Input Noise Voltage (Note 1) f = 100kHz +25
+Input Noise Current (Note 1) f = 100kHz +25

-Input Noise Current (Note 1) f = 100kHz +25

= 0V +25oC2mV

CM

= 0V +25oC25µA

CM

= 0V +25oC12µA

CM

= 0V +25oC ±200 µA

CM

= ±2V +25oC50kΩ

CM

o

C16Ω

o

C 2.2 pF

o

C 4 nV/√Hz

o

C 18 pA/√Hz

o

C 21 pA/√Hz

o

C

o

C

o

C

Input Common Mode Range Full ±3.0 V
Open Loop Transimpedance AV = -1 +25oC 500 kΩ
Output Voltage A

Output Current (Note 1) A

DC Closed Loop Output Resistance +25
Quiescent Supply Current (Note 1) R

-3dB Bandwidth (Note 1) A

Slew Rate A

Full Power Bandwidth V
Gain Flatness (Note 1) To 30MHz, R

Linear Phase Deviation (Note 1) To 100MHz, R
2nd Harmonic Distortion (Note 1) 30MHz, V

3rd Harmonic Distortion (Note 1) 30MHz, V

3rd Order Intercept (Note 1) 100MHz, R
1dB Compression 100MHz, R
Reverse Isolation (S

) 40MHz, RF = 510Ω +25oC -70 dB

12

= -1, RL = 100Ω +25oC ±3.3 V

V

A

= -1, RL = 100Ω Full ±3.0 V

V

= -1, RL = 50Ω +25oC to +125oC ±65 mA

V

A

= -1, RL = 50Ω -55oC to 0oC ±50 mA

V

= Open Full 24 mA

L

= -1, RF = 430Ω, V

V

A

= +1, RF = 510Ω, V

V

A

= +2, RF = 360Ω, V

V

= +1, RF = 510Ω, V

V

A

= +2, V

V

= 5V

OUT

To 50MHz, R
To 100MHz, R

50MHz, V
100MHz, V

50MHz, V
100MHz, V

100MHz, R
600MHz, R

= 5V

OUT

P-P

= 510Ω +25oC ±0.014 dB

F

= 510Ω +25oC ±0.05 dB

F

F
F

= 2V

OUT

= 2V

OUT

OUT

= 2V

OUT

= 2V

OUT

OUT

= 510Ω +25oC 30 dBm

F

= 510Ω +25oC 20 dBm

F

= 510Ω +25oC -60 dB

F

= 510Ω +25oC -32 dB

F

= 510Ω +25oC ±0.14 dB
= 510Ω +25oC ±0.6 Degrees

= 2V

= 2V

P-P

P-P
P-P

P-P
P-P

P-P

P-P

OUT

OUT
OUT
OUT

= 200mV

= 200mV
= 200mV
= 5V

P-P

P-P

P-P
P-P

o

C 0.1 Ω

+25oC 580 MHz
+25oC 850 MHz
+25oC 670 MHz
+25oC 1500 V/µs
+25oC 2300 V/µs
+25oC 220 MHz

+25oC -55 dBc
+25oC -49 dBc
+25oC -44 dBc
+25oC -84 dBc
+25oC -70 dBc
+25oC -57 dBc

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