Intersil Corporation HMA510-883 Datasheet
April 1997
HMA510/883
16 x 16-Bit CMOS Parallel
Multiplier Accumulator
Features
• This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
• 16 x 16-Bit Parallel Multiplication with Accumulation
to a 35-Bit Result
• High-Speed (55ns) Multiply Accumulate Time
• Low Power CMOS Operation
-I
-I
= 500µA Maximum
CCSB
= 7.0mA Maximum at 1.0MHz
CCOP
• HMA510/883 is Compatible with the CY7C510 and the
IDT7210
• Supports Two’s Complement or Unsigned Magnitude
Operations
• Three-State Outputs
Ordering Information
TEMP.
PART NUMBER
HMA510GM-55/883 -55 to 125 68 Ld CPGA G68.B
HMA510GM-65/883 -55 to 125 68 Ld CPGA G68.B
HMA510GM-75/883 -55 to 125 68 Ld CPGA G68.B
RANGE (oC) PACKAGE
PKG.
NO.
Description
The HMA510/883 is a high speed, low power CMOS 16 x
16-bit parallel multiplier accumulator capable of operating at
55ns clocked multiply-accumulate cycles. The 16-bit X and Y
operands may be specified as either two’s complement or
unsigned magnitude format. Additional inputs are provided
for the accumulator functions which include: loading the
accumulator with the current product, adding or subtracting
the accumulator contents and the current product, and preloading the Accumulator Registers from the external inputs.
All inputs and outputs are registered. The registers are all
positive edge triggered, and are latched on the rising edge of
the associated clock signal. The 35-bit Accumulator Output
Register is broken into three parts. The 16-bit least significant product (LSP), the 16-bit most significant product
(MSP), and the 3-bit extended product (XTP) Registers. The
XTP and MSP Registers have dedicated output ports, while
the LSP Register shares the Y-inputs in a multiplexed fashion. The entire 35-bit Accumulator Output Register may be
preloaded at any time through the use of the bidirectional
output ports and the preloaded control.
Block Diagram
SUB
X0-15
REGISTER
CLKY
CLKX
PRELOAD
CLKP
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
| Copyright © Intersil Corporation 1999
XTP REGISTER MSP REGISTER LSP REGISTER
OEX
OEM
OEL
P32-34
RND
ACC
TC
REGISTER REGISTER
MULTIPLIER ARRAY
35
ACCUMULATOR
3
P16-31
3-10
16
Y0-15 P0-15
1616
35
16
File Number 2807.2
Pinout
HMA510/883
68 LEAD CPGA
TOP VIEW
X15
X13
X11
X9
X7
X5
X3
X1
N/C
N/C
X14
X12
X10
X8
X6
X4
X2
X0
Y1/P1
Y2/P2
BA KLCD E F GH J
11
10
9
8
7
6
5
4
Y0/P0
3
2
1
OEL
Y3/P3
Y4/P4
RND
SUB
Y5/P5
Y6/P6
ACC
CLKX
Y7/P7
GND
CLKY
V
CC
TOP VIEW
Y8/P8
Y9/P9
PREL
TC
OEX
OEM
Y10/
Y12/
P10 P12 P14
Y11/
Y13/
P11 P13 P15
CLKP
P34
Y14/
Y15/
P33
P32
P30
P28
P26
P24
P22
P20
P18
P16
N/C
N/C
P31
P29
P27
P25
P23
P21
P19
P17
Pin Descriptions
NAME TYPE DESCRIPTION
V
CC
GND The device ground.
X0-X15 I X-Input Data. These 16 data inputs provide the multiplicand which may be in two's complement or
Y0-Y15/P0-P15 I/O Y-Input/LSP Output Data. This 16-bit port is used to provide the multiplier which may be in two's com-
P16-P3 I/O MSP Output Data. This 16-bit port is used to provide the most significant product output (P16-P31).
P32-P34 I/O XTP Output Data. This 3-bit port is used to provide the extended product output (P32-P34). It may
TC I Two's Complement Control. Input data is interpreted as two's complement when this control is HIGH.
ACC I Accumulate Control. When this control is HIGH, the Accumulator Output Register contents are added
The +5V power supply pins. 0.1µF capacitors between the VCC and GND pins are recommended.
unsigned magnitude format.
plement or unsigned magnitude format. It may also be used for output of the least significant product
(P0-P15) or for preloading the LSP Register.
It may also be used to preload the MSP Register.
also be used to preload the XTP Register.
A LOW indicates the data is to be interpreted as unsigned magnitude format. This control is latched
on the rising edge of CLKX or CLKY.
to or subtracted from the current product, and the result is stored back into the Accumulator Output
Register.
When LOW, the product is loaded into the Accumulator Output Register overwriting the current contents. This control is also latched on the rising edge of CLKX or CLKY.
3-11
HMA510/883
Pin Descriptions
NAME TYPE DESCRIPTION
SUB I Subtract Control. When both SUB and ACC are HIGH, the Accumulator Register contents are sub-
RND I Round Control. When this control is HIGH, a one is added to the most significant bit of the LSP. When
PREL I Preload Control. When this control is HIGH, the three bidirectional ports may be used to preload the
OEL I Y-Input/LSP Output Port Three-State Control. When OEL is HIGH, the output drivers are in the high
OEM I MSP Output Port Three-State Control. A LOW on this control line enables the port for output. When
OEX I XTP Output Port Three-State Control. A LOW on this control line enables the port for output. When
CLKX I X-Register Clock. The rising edge of this clock latches the X-Data Input Register along with the TC,
(Continued)
tracted from the current product. When ACC is HIGH and SUB is LOW, the Accumulator Register
contents and the current product are summed. The SUB control input is latched on the rising edge of
CLKX or CLKY.
LOW, the product is unchanged.
Accumulator Registers. The three-state controls (OEX, OEM, OEL) must be HIGH, and the data will
be preloaded on the rising edge of CLKP. When this control is LOW, the Accumulator Registers function in a normal manner.
impedance state. This state is required for Y-data input or preloading the LSP Register. When OEL
is LOW, the port is enabled for LSP output.
OEM is HIGH, the output drivers are in the high impedance state.
This control must be HIGH for preloading the MSP Register.
OEX is HIGH, the output drivers are in the high impedance state. This control must be HIGH for preloading the XTP Register.
ACC, SUB and RND inputs.
CLKY I Y-Register Clock. The rising edge of this clock latches the Y-Data Input Register along with the TC,
ACC, SUB and RND inputs.
CLKP I Product Register Clock. The rising edge of CLKP latches the LSP, MSP and XTP Registers. If the
preload control is active, the data on the I/O ports is loaded into these registers. If preload is not active, the accumulated product is loaded into the registers.
3-12
Loading...