Intersil Corporation HIP6311 Datasheet

HIP6311

Data Sheet February 2000

Microprocessor CORE Voltage Regulator
Multi-Phase Buck PWM Controller

The HIP6311 multi-phase PWM control IC together with its
companion gate drivers, the HIP6601, HIP6602 or HIP6603
and internal MOSFETs provides a precision voltage
regulation system for advanced microprocessors.
Multiphase power conversion is a marked departure from
earlier single phase converter configurations previously
employed to satisfy the ever increasing current demands of
modern microprocessors. Multi-phase convertors, by
distributing the power and load current results in smaller and
lower cost transistors with fewerinputand output capacitors.
These reductions accrue from the higher effective
conversion frequency with higher frequency ripple current
due to the phase interleaving process of this topology. For
example, a three phase convertor operating at 350kHz will
have a ripple frequency of 1.05MHz. Moreover, greater
convertor bandwidth of this design results in faster response
to load transients.

Outstanding features of this controller IC include
programmable VID codes from the microprocessor that
range from 1.100V to 1.850V with a system accuracy of
±0.8%. Pull up currents on these VID pins eliminates the
need for external pull up resistors. In addition “droop”
compensation, used to reduce the overshoot or undershoot
of the CORE voltage, is easily programmed with a single
resistor.

Another feature of this controller IC is the PGOOD monitor
circuit which is held low until the CORE voltage increases,
during its Soft-Start sequence, to within 10% of the
programmedvoltage.Over-voltage,15%aboveprogrammed
CORE voltage, results in the converter shutting down and
turning the lower MOSFETs ON to clamp and protect the
microprocessor. Under voltage is also detected and results
in PGOOD low if the CORE voltage falls 10% below the
programmed level. Over-current protection reduces the
regulator current to less than 25% of the programmed trip
value. These features provide monitoring and protection for
the microprocessor and power system.

File Number 4817

Features

• Multi-Phase Power Conversion

• Precision Channel Current Sharing

- Loss Less Current Sampling - Uses r

DS(ON)

• Precision CORE Voltage Regulation

- ±0.8% System Accuracy Over Temperature

• Microprocessor Voltage Identification Input

- 5-Bit VID Input

- 1.100V to 1.850V in 25mV Steps

- Programmable “Droop” Voltage

• Fast Transient Recovery Time

• Over Current Protection

• Automatic Selection of 2, 3, or 4 Phase Operation

• High Ripple Frequency, (Channel Frequency) Times

Number Channels . . . . . . . . . . . . . . . . . 100kHz to 6MHz

Ordering Information

PART NUMBER TEMP. (oC) PACKAGE PKG. NO.

HIP6311CB 0 to 70 20 Ld SOIC M20.3
HIP6311CB-T 20 Ld SOIC Tape and Reel
HIP6301EVAL1 Evaluation Platform

Pinout

HIP6311 (SOIC)

TOP VIEW

VID4
VID3
VID2
VID1
VID0

COMP

FB

FS/DIS

GND

VSEN

1
2
3
4
5
6
7
8
9

10

20
19
18
17
16
15
14
13
12
11

V

CC

PGOOD
PWM4
ISEN4
ISEN1
PWM1
PWM2
ISEN2
ISEN3
PWM3

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143

| Copyright © Intersil Corporation 2000

Block Diagram

VSEN

X 0.9

X1.15

+

-

+

-

UV

OVP

PGOOD

LATCH

S

OV

HIP6311HIP6311

+

∑

POWER-ON

RESET (POR)

-

V

CC

CLOCK AND

SAWTOOTH

GENERATOR

THREE

STATE

FS/EN

+

PWM

PWM1

-

COMP

VID0

VID1

VID2

VID3

VID4

FB

D/A

SOFT-

START

AND FAULT

LOGIC

+

-

I_TOT

OC

E/A

+

-

∑

I_TRIP

+

+

+

+

CORRECTION

+

∑

-

+

∑

+

CURRENT

+

PWM

PWM2

-

+

-

∑

-

PWM

-

+

PWM

-

PHASE

NUMBER

CHANNEL

DETECTOR

PWM3

PWM4

ISEN1

ISEN2

ISEN3

ISEN4

GND

2

Simplified Power System Diagram

VSEN

PWM 1

HIP6311HIP6311

SYNCHRONOUS

RECTIFIED BUCK

CHANNEL

PWM 2

SYNCHRONOUS

RECTIFIED BUCK

HIP6311

PWM 3

PWM 4

VID

SYNCHRONOUS

RECTIFIED BUCK

SYNCHRONOUS

RECTIFIED BUCK

Functional Pin Description

1

VID4

2

VID3

3

VID2

4

VID1

5

VID0

6

COMP

7

FB

8

FS/DIS

9

GND

10

VSEN

VID4 (Pin 1), VID3(Pin 2), VID2 (Pin 3), VID1(Pin 4)
and VID0 (Pin 5)

V oltage Identification inputs from microprocessor. These pins
respond to TTL and 3.3V logic signals. The HIP6311 decodes
VID bits to establish the output voltage. See Table 1.

COMP (Pin 6)

Output of the internal error amplifier. Connect this pin to the
external feedback and compensation network.

FB (Pin 7)

Inverting input of the internal error amplifier.

FS/DIS (Pin 8)

Channel frequency,FSW, select and disable. A resistor from
this pin to ground sets the switching frequency of the

20
19
18
17
16
15
14
13
12
11

V

CC

PGOOD
PWM4
ISEN4
ISEN1
PWM1
PWM2
ISEN2
ISEN3
PWM3

CHANNEL

MICROPROCESSOR

CHANNEL

CHANNEL

converter. Pulling this pin to ground disables the converter
and three states the PWM outputs. See Figure 10.

GND (Pin 9)

Bias and reference ground. All signals are referenced to this
pin.

VSEN (Pin 10)

Power good monitor input. Connect to the microprocessor­CORE voltage.

PWM1 (Pin 15), PWM2 (Pin 14), PWM3 (Pin 11) and
PWM4 (Pin 18)

PWM outputs for each driven channel in use. Connect these
pins to the PWM input of a HIP6601/2/3 driver. For systems
which use 3 channels, connect PWM4 high. Two channel
systems connect PWM3 and PWM4 high.

ISEN1 (Pin 16), ISEN2 (Pin 13), ISEN3 (Pin 12) and
ISEN4 (Pin 17)

Current sense inputs from the individual converter channel’s
phase nodes. Unused sense lines MUST be left open.

PGOOD (Pin 19)

Power good. This pin provides a logic-high signal when the
microprocessor CORE voltage (VSEN pin) is within specified
limits and Soft-Start has timed out.

VCC (Pin 20)

Bias supply. Connect this pin to a 5V supply.

3

HIP6311HIP6311

Typical Application - 2 Phase Converter Using HIP6601 Gate Drivers

+12V

V

IN

+5V

VCC

BOOT

PVCC

UGATE

PHASE

= +5V

PGOOD

VID4

VID3

VID2
VID1

VID0

FB

VSEN

MAIN

CONTROL

HIP6311

FS/DIS

GND

COMP

PWM4
PWM3

PWM2

PWM1

ISEN4
ISEN3
ISEN2
ISEN1

VCC

PVCC

DRIVER
HIP6601

DRIVER
HIP6601

BOOT

LGATE
GND

UGATE
PHASE

LGATE
GND

V

= +5V

IN

+V

CORE

PWM

V

CC

+12V

NC
NC

PWM

4

HIP6311HIP6311

Typical Application - 4 Phase Converter Using HIP6602 Gate Drivers

PGOOD

VID4

VID3

VID2
VID1

VID0

FB

VSEN

CONTROL

HIP6311

FS/DIS

MAIN

GND

COMP

ISEN1

PWM1

PWM2

ISEN2

ISEN3

PWM3
PWM4

ISEN4

BOOT1

UGATE1

PHASE1

LGATE1

PVCC

+5V

+12V

V

CC

DUAL
DRIVER
HIP6602

BOOT2

V

CC

PWM1

PWM2

+12V

V

CC

UGATE2

PHASE2

LGATE2

GND

BOOT3

UGATE3

PHASE3

VIN = +12V

+5V

V

IN

VIN+12V

+12V

L

01

L

02

+V

CORE

L

03

LGATE3

DUAL

DRIVER

HIP6602

PWM3

PWM4

GND

PVCC

BOOT4

UGATE4

PHASE4

LGATE4

+5V

V

+12V

IN

L

04

5

HIP6311HIP6311

Absolute Maximum Ratings

Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7V

Input, Output, or I/O Voltage . . . . . . . . . . GND -0.3V to VCC+ 0.3V

ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5KV

Thermal Information

Thermal Resistance (Typical, Note 1) θJA (oC/W)

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150oC

Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC

Recommended Operating Conditions

Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±5%

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC

(SOIC - Lead Tips Only)

Ambient Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 70oC

CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational section of this specification is not implied.

NOTE:

1. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief 379 for details.

Electrical Specifications Operating Conditions: V

= 5V, TA = 0oC to 70oC, Unless Otherwise Specified

CC

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

INPUT SUPPLY POWER

Input Supply Current R
POR (Power-On Reset) Threshold V

= 100kΩ, Active and Disabled Maximum Limit - 10 15 mA

T

Rising 4.25 4.38 4.5 V

CC

Falling 3.75 3.88 4.00 V

V

CC

REFERENCE AND DAC

System Accuracy Percent system deviation from programmed VID Codes -0.8 - 0.8 %
DAC (VID0 - VID4) Input Low Voltage DAC Programming Input Low Threshold Voltage - - 0.8 V
DAC (VID0 - VID4) Input High Voltage DAC Programming Input High Threshold Voltage 2.0 - - V
VID Pull-Up VIDx = 0V or VIDx = 3V 10 20 40 µA

CHANNEL GENERATOR

Frequency, F

SW

RT = 100kΩ,±1% 245 275 305 kHz
Adjustment Range See Figure 10 0.05 - 1.5 MHz
Disable Voltage Maximum voltage at FS/DIS to disable controller. I

= 1mA. - - 1.0 V

FS/DIS

ERROR AMPLIFIER

DC Gain R
Gain-Bandwidth Product C
Slew Rate C

= 10K to ground - 72 - dB

L

= 100pF, RL = 10K to ground - 18 - MHz

L

= 100pF, Load = ±400µA - 5.3 - V/µs

L

Maximum Output Voltage Load = 400µA 3.6 4.1 - V
Minimum Output Voltage Load = -400µA - 0.16 0.5 V

I

SEN

Full Scale Input Current -50-µA
Over-Current Trip Level - 82.5 - µA

POWER GOOD MONITOR

Under-Voltage Threshold VSEN Rising - 0.92 - V
Under-Voltage Threshold VSEN Falling - 0.90 - V
PGOOD Low Output Voltage I

= 4mA - 0.18 0.4 V

PGOOD

DAC
DAC

PROTECTION

Over-Voltage Threshold VSEN Rising 1.12 1.15 1.2 V

DAC

Percent Over-Voltage Hysteresis VSEN Falling after Over-Voltage - 2 - %

6