Intersil Corporation HIP6303 Datasheet

HIP6303

Data Sheet December 1999

Microprocessor CORE Voltage Regulator
Multi-Phase Buck PWM Controller

The HIP6303 multi-phase PWM control IC together with its
companion gate drivers, the HIP6601, HIP6602 or HIP6603
and Intersil MOSFETs provides a precision voltage
regulation system for advanced microprocessors.
Multiphase power conversion is a marked departure from
earlier single channel converter configurations previously
employed to satisfy the ever increasing current demands of
modern microprocessors. Multi-phase converters, by
distributing the power and load current results in smaller and
lower cost transistors with fewerinputand output capacitors.
These reductions accrue from the higher effective
conversion frequency with higher frequency ripple current
due to the phase interleaving process of this topology. For
example, a three channel converter operating at 350kHz will
have a ripple frequency of 1.05MHz. Moreover, greater
converter bandwidth of this design results in faster response
to load transients.

Outstanding features of this controller IC include
programmable VID codes from the microprocessor that
range from 1.30V to 2.05V with a system accuracy of ±1%.
Pull up currents on these VID pins eliminates the need for
external pull up resistors. In addition “droop” compensation,
used to reduce the overshoot or undershoot of the CORE
voltage, is easily programmed with a single resistor.

Another feature of this controller IC is the PGOOD monitor
circuit which is held low until the CORE voltage increases,
during its Soft-Start sequence, to within 10% of the
programmedvoltage.Over-voltage,15%aboveprogrammed
CORE voltage, results in the converter shutting down and
turning the lower MOSFETs ON to clamp and protect the
microprocessor. Under voltage is also detected and results
in PGOOD low if the CORE voltage falls 10% below the
programmed level. Over-current protection reduces the
regulator current to less than 25% of the programmed trip
value. These features provide monitoring and protection for
the microprocessor and power system.

File Number 4767

Features

• AMD Athlon Compatible

• Multi-Phase Power Conversion

• Precision Channel Current Sharing

- Loss Less Current Sampling - Uses r

DS(ON)

• Precision CORE Voltage Regulation

- ±1% System Accuracy Over Temperature

• Microprocessor Voltage Identification Input

- 4-Bit VID Input

- 1.30V to 2.05V in 50mV Steps

- Programmable “Droop” Voltage

• Fast Transient Recovery Time

• Over Current Protection

• Automatic Selection of 2, 3, or 4 Channel Operation

• High Ripple Frequency, (Channel Frequency) Times

Number of Channels . . . . . . . . . . . . . . . 100kHz to 6MHz

Ordering Information

PART NUMBER TEMP. (oC) PACKAGE PKG. NO.

HIP6303CB 0 to 70 20 Ld SOIC M20.3
HIP6303CB-T 20 Ld SOIC Tape and Reel
HIP6303EVAL1 Evaluation Platform

Pinout

HIP6303 (SOIC)

TOP VIEW

VID3
VID2
VID1
VID0

EN

COMP

FB

FS/DIS

GND

VSEN

1
2
3
4
5
6
7
8
9

10

20
19
18
17
16
15
14
13
12
11

V

CC

PGOOD
PWM4
ISEN4
ISEN1
PWM1
PWM2
ISEN2
ISEN3
PWM3

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143

Athlon™ is a trademark of Advanced Micro Devices, Inc.

| Copyright © Intersil Corporation 1999

Block Diagram

VSEN

X 0.9

X1.15

+

-

+

-

UV

OVP

PGOOD

LATCH

S

OV

HIP6303

+

∑

POWER-ON

RESET (POR)

-

V

CC

CLOCK AND

SAWTOOTH

GENERATOR

THREE

STATE

FS/EN

+

PWM

PWM1

-

EN

COMP

VID0

VID1

VID2

VID3

FB

D/A

SOFT-

START

AND FAULT

LOGIC

+

-

I_TOT

OC

E/A

+

-

∑

I_TRIP

+

+

+

+

CORRECTION

+

∑

-

+

∑

+

CURRENT

+

PWM

PWM2

-

+

-

∑

-

PWM

-

+

PWM

-

CHANNEL

NUMBER

CHANNEL

DETECTOR

PWM3

PWM4

ISEN1

ISEN2

ISEN3

ISEN4

GND

2

Simplified Power System Diagram

VSEN

PWM 1

HIP6303

SYNCHRONOUS

RECTIFIED BUCK

CHANNEL

PWM 2

HIP6303

PWM 3

PWM 4

VID

Functional Pin Description

1

VID3

2

VID2

3

VID1

4

VID0

5

EN

6

COMP

7

FB

8

FS/DIS

9

GND

10

VSEN

20
19
18
17
16
15
14
13
12
11

V

CC

PGOOD
PWM4
ISEN4
ISEN1
PWM1
PWM2
ISEN2
ISEN3
PWM3

SYNCHRONOUS

RECTIFIED BUCK

CHANNEL

MICROPROCESSOR

SYNCHRONOUS

RECTIFIED BUCK

CHANNEL

SYNCHRONOUS

RECTIFIED BUCK

CHANNEL

FS/DIS (Pin 8)

Channel frequency,FSW, select and disable. A resistor from
this pin to ground sets the switching frequency of the
converter. Pulling this pin to ground disables the converter
and three states the PWM outputs. See Figure 10.

GND (Pin 9)

Bias and reference ground. All signals are referenced to this
pin.

VSEN (Pin 10)

Power good monitor input. Connect to the microprocessor­CORE voltage.

VID3 (Pin 1), VID2 (Pin 2), VID1 (Pin 3) and VID0
(Pin 4)

V oltage Identification inputs from microprocessor. These pins
respond to TTL and 3.3V logic signals.TheHIP6303decodes
VID bits to establish the output voltage. See Table 1.

EN (Pin 5)

Enable pin normal operation is with input open or high. A low
input disables the regulator and three states the PWM
outputs.

COMP (Pin 6)

Output of the internal error amplifier. Connect this pin to the
external feedback and compensation network.

FB (Pin 7)

Inverting input of the internal error amplifier.

3

PWM1 (Pin 15), PWM2 (Pin 14), PWM3 (Pin 11) and
PWM4 (Pin 18)

PWM outputs for each driven channel in use. Connect these
pins to the PWM input of a HIP6601/2/3 driver. For systems
which use 3 channels, connect PWM4 high. Two channel
systems connect PWM3 and PWM4 high.

ISEN1 (Pin 16), ISEN2 (Pin 13), ISEN3 (Pin 12) and
ISEN4 (Pin 17)

Current sense inputs from the individual converter channel’s
phase nodes. Unused sense lines MUST be left open.

PGOOD (Pin 19)

Power good. This pin provides a logic-high signal when the
microprocessor-CORE voltage (VSEN pin) is within
specified limits and Soft-Start has timed out.

VCC (Pin 20)

Bias supply. Connect this pin to a 5V supply.

HIP6303

Typical Application - AMD Athlon 2 Channel Converter Using HIP6601 Gate Drivers

+12V

= +5V

V

IN

+5V

VCC

BOOT

PVCC

UGATE

PHASE

PGOOD

EN
VID3

VID2
VID1

VID0

FB

VSEN

MAIN

CONTROL

HIP6303

FS/DIS

GND

COMP

PWM4
PWM3

PWM2

PWM1

ISEN4
ISEN3
ISEN2
ISEN1

VCC

PVCC

DRIVER
HIP6601

DRIVER
HIP6601

BOOT

LGATE
GND

UGATE
PHASE

LGATE
GND

V

IN

= +5V

+V

CORE

PWM

V

CC

+12V

NC
NC

PWM

4

HIP6303

Typical Application - 4 Channel Converter Using HIP6602 Gate Drivers

= +12V

V

+12V

BOOT1

IN

PGOOD

EN

VID3

VID2
VID1

VID0

FB

VSEN

CONTROL

HIP6303

FS/DIS

MAIN

GND

COMP

ISEN1

PWM1

PWM2

ISEN2

ISEN3

PWM3
PWM4

ISEN4

GND

UGATE1

PHASE1

LGATE1

PVCC

BOOT2

UGATE2

PHASE2

LGATE2

BOOT3

UGATE3

PHASE3

+5V

V

+12V

IN

VIN+12V

VCC

+5V

DUAL
DRIVER
HIP6602

V

CC

PWM1

PWM2

+12V

VCC

L

01

L

02

+V

CORE

L

03

LGATE3

DUAL

DRIVER

HIP6602

PWM3

PWM4

GND

PVCC

BOOT4

UGATE4

PHASE4

LGATE4

+5V

V

+12V

IN

L

04

5

HIP6303

Absolute Maximum Ratings

Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7V

Input, Output, or I/O Voltage . . . . . . . . . . GND -0.3V to VCC+ 0.3V

ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class TBD

Recommended Operating Conditions

Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±5%

Ambient Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 70oC

CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational section of this specification is not implied.

NOTE:

1. θJA is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications Operating Conditions: V

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

INPUT SUPPLY POWER

Input Supply Current RT= 100kΩ, Active and Disabled Maximum Limit - 10 15 mA
POR (Power-On Reset) Threshold VCC Rising 4.25 4.38 4.5 V

VCC Falling 3.75 3.88 4.00 V

REFERENCE AND DAC

System Accuracy Percent system deviation from programmed VID Codes -1 - 1 %
DAC (VID0 - VID3) Input Low Voltage DAC Programming Input Low Threshold Voltage - - 0.8 V
DAC (VID0 - VID3) Input High Voltage DAC Programming Input High Threshold Voltage 2.0 - - V
VID Pull-Up VIDx = 0V or VIDx = 3V 10 20 30 µA

CHANNEL GENERATOR

Frequency, F
Adjustment Range See Figure 10 0.05 - 1.5 MHz
Disable Voltage Maximum voltage at FS/DIS to disable controller. I

ERROR AMPLIFIER

DC Gain RL = 10K to ground - 72 - dB
Gain-Bandwidth Product CL = 100pF, RL = 10K to ground - 18 - MHz
Slew Rate CL = 100pF, Load = ±400µA - 5.3 - V/µs
Maximum Output Voltage RL = 10K to ground, Load = 400µA 3.6 4.1 - V
Minimum Output Voltage RL = 10K to ground, Load = -400µA - 0.16 0.5 V

I

SEN

Full Scale Input Current -50-µA
Over-Current Trip Level - 82.5 - µA

POWER GOOD MONITOR

Under-Voltage Threshold VSEN Rising - 0.92 - V
Under-Voltage Threshold VSEN Falling - 0.90 - V
PGOOD Low Output Voltage I

PROTECTION

Over-Voltage Threshold VSEN Rising 1.12 1.15 1.2 V
Percent Over-Voltage Hysteresis VSEN Falling after Over-Voltage - 2 - %

SW

RT = 100kΩ,±1% 245 275 305 kHz

= 4mA - 0.18 0.4 V

PGOOD

= 5V, TA = 0oC to 70oC, Unless Otherwise Specified

CC

Thermal Information

Thermal Resistance (Typical, Note 1) θJA (oC/W)

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150oC

Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC

(SOIC - Lead Tips Only)

= 1mA. - - 1.0 V

FS/DIS

DAC
DAC

DAC

6