Intersil Corporation HIP6028 Datasheet

HIP6028

Data Sheet May 1998 File Number

Advanced PWM and Dual Linear Power
Control with Integrated ACPI Support
Interface

The HIP6028 provides the power control and protection for
three output voltages in high-performance microprocessor
and computer applications. The IC integrates a PWM
controller,a linear regulator and a linear controller as well as
the monitoring and protection functions into a single
package. The PWM controller regulates the microprocessor
core voltage with a synchronous-rectified buck converter.
The linear controller regulates power for the GTL bus and
the linear regulator provides powerfor the clock driver circuit.

The HIP6028 includes an Intel-compatible, TTL 5-input
digital-to-analog converter (DAC)that adjusts the core PWM
output voltage from 2.1V
and from 1.3V

to 2.05VDC in 0.05V steps. The precision

DC

to 3.5VDC in 0.1V increments

DC

reference and voltage-mode control provide±1% static
regulation. The linear regulator uses an internal pass device
to provide a fixed 2.5V ±2.5%. The linear controller drives an
external N-channel MOSFET to provide a fixed 1.5V ±2.5%.

The HIP6028 monitors all the output voltages. A single
Power Good signal is issued when the core is within ±10% of
the DAC setting and the other levels are above their under­voltage levels. Additional built-in over-voltage protection for
the core output uses the lower MOSFET to prevent output
voltages above 115% of the DAC setting. The PWM over­current function monitors the output current by using the
voltage drop across the upper MOSFET’s r

DS(ON)

,

eliminating the need for a current sensing resistor.
The HIP6028 offers integrated ACPI S3 shutdown state

support. Through the SD1&3 pin, the microprocessor core
and GTL bus supplies can be shut down when entering
power-saving standby operation mode.

Ordering Information

TEMP.

RANGE

PART NUMBER

HIP6028CB 0 to 70 24 Ld SOIC M24.3
HIP6028EVAL1 Evaluation Board

(oC) PACKAGE PKG. NO.

4630

Features

• Provides 3 Regulated Voltages

- Microprocessor Core, Clock and GTL Power

• Integrated ACPI S3-State Shutdown Support

• Drives Low Cost Transistors

- PWM Controller Drives N-MOSFETs

- Linear Controller Compatible with Both MOSFETs and
NPN Bipolar Transistors

• Operates from +3.3V, +5V and +12V Inputs

• Simple Control Design

- Single-Loop Voltage-Mode PWM Control

- Fixed 1.5V GTL Output Voltage

- Fixed 2.5V Clock Output Voltage

• Fast Transient Response

- High-Bandwidth Error Amplifier

- Full 0% to 100% Duty Ratio

• Excellent Output Voltage Regulation

- Core PWM Output: ±1% Over Temperature

- Other Outputs: ±2.5% Over Temperature

• TTL-compatible 5-Bit Digital-to-Analog Core Output
Voltage Selection

- Wide Range . . . . . . . . . . . . . . . . . . . 1.3V

DC

to 3.5V

• Power-Good Output Voltage Monitor

• Microprocessor Core Voltage Protection Against Shorted
MOSFET

• Over-Voltage and Over-Current Fault Monitors

- Does Not Require Extra Current Sensing Element,

Uses MOSFET’s r

DS(ON)

• Small Converter Size

- Constant Frequency Operation; 200kHz Free-Running

Oscillator; Programmable from 50kHz to 1MHz

Applications

•

Full Motherboard Power Regulation for Computers

•

Low-Voltage Distributed Power Supplies

Pinout

HIP6028 (SOIC)

TOP VIEW

24
23
22
21
20
19
18
17
16
15
14
13

UGATE
PHASE
LGATE
PGND
OCSET
VSEN1
FB
COMP
VSEN3
DRIVE3
GND
VOUT2

VCC
VID4
VID3
VID2
VID1
VID0

PGOOD

FAULT

SS
RT

SD1&3

VIN2

1
2
3
4
5
6
7
8

9
10
11
12

DC

2-311

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

Block Diagram

HIP6028

VCC

OCSET

VSEN1

3.3V

POWER-ON

RESET (POR)

200µA

+

110%

LINEAR

UNDER-

VOLTAGE

+

-

-

LUV

PGOOD

+

90%

-

+

DRIVE

LOWER

PGND

TTL D/A

GND

CONVERTER

RT

OSCILLATOR

FB COMP

FIGURE 1.

VID4

VID3

(DAC)

VID2

VID1

VID0

UGATE

PHASE

VCC

DRIVE

UPPER

GATE

INHIBIT

-

+

OC1

-

+

115%

-
+

OV

SOFT-

LOGIC

START

& FAULT

POR

CONTROL

+

-

VCC

PWM

-

PWM

COMP

ERROR

DACOUT

LGATE

AMP

VSEN3

0.3V

-

+

DRIVE3

2-312

11µA

-

+

3.3V

VIN2

1.26V

-

+

-

+

CLIM2

-

+

0.23A

VOUT2

VCC

SS

FAULT

4V

SD1&3

Simplified Power System Diagram

+5V

IN

HIP6028

+3.3V

IN

V

V

Typical Application

+12V

IN

+5V

IN

+3.3V

IN

V

OUT2

2.5V
C

OUT2

OUT2

OUT3

Q1

Q2

V

OUT1

Q3

LINEAR

REGULATOR

HIP6028

LINEAR

CONTROLLER

PWM

CONTROLLER

FIGURE 2.

C

IN

VCC

VIN2

VOUT2

OCSET

PGOOD

UGATE
PHASE

Q1

L

OUT1

POWERGOOD

V

OUT1

1.3V TO 3.5V

V

OUT3

1.5V
C

OUT3

Q3

2-313

DRIVE3

VSEN3

SD1&3

VID0
VID1
VID2

VID3
VID4

HIP6028

GND

FIGURE 3.

LGATE
PGND

VSEN1

FB

COMP

FAULT
RT

SS

Q2

C

SS

C

OUT1

HIP6028

Absolute Maximum Ratings Thermal Information

Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +15V

PGOOD, RT, FAULT, DRIVE3,

LGATE, and UGATE Voltage . . . . . . . . . GND - 0.3V to VCC + 0.3V

Other Input, Output or I/O Voltage. . . . . . . . . . . . . GND -0.3V to 7V

Operating Conditions

Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . +12V ±10%

Ambient Temperature Range. . . . . . . . . . . . . . . . . . . . 0oC to 70oC

Junction Temperature Range. . . . . . . . . . . . . . . . . . . 0oC to 125oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. θJA is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Refer to Figures 1, 2 and 3

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

VCC SUPPLY CURRENT

Nominal Supply I

POWER-ON RESET

Rising VCC Threshold V
Falling VCC Threshold V
Rising VIN2 Under-Voltage Threshold 2.45 2.55 2.65 V
VIN2 Under-Voltage Hysteresis - 0.5 - V
Rising V

OSCILLATOR

Free Running Frequency RT = OPEN 185 200 215 kHz
Total Variation 6kΩ < RT to GND < 200kΩ -15 - +15 %
Ramp Amplitude ∆V

REFERENCE and DAC

DAC(VID0-VID4) Input Low Voltage - - 0.8 V
DAC(VID0-VID4) Input High Voltage 2.0 - - V
DACOUT Voltage Accuracy -1.0 - +1.0 %

LINEAR REGULATOR

Regulation 10mA < I
Under-Voltage Level VOUT2UVVOUT2 Rising - 1.875 2.175 V
Under-Voltage Hysteresis - 0.150 - V
Over-Current Protection (Current-Limiting) 180 230 - mA

LINEAR CONTROLLER

Regulation VSEN3 = DRIVE3 1.462 1.500 1.538 V
Under-Voltage Level VSEN3UVVSEN3 Rising - 1.125 1.305 V
Under-Voltage Hysteresis - 0.090 - V
DRIVE3 Source Current VSEN3 = 1.4V, DRIVE3 = 2V, VIN2 = 3.3V 20 40 - mA

PWM CONTROLLER ERROR AMPLIFIER

DC Gain -88- dB
Gain-Bandwidth Product GBWP - 15 - MHz

Threshold - 1.25 - V

OCSET

CC

OSC

UGATE, DRIVE3, LGATE, and VOUT2 Open - 8 - mA

= 4.5V 8.6 - 10.4 V

OCSET

= 4.5V 8.2 - 10.2 V

OCSET

RT = Open - 1.9 - V

VOUT2

Thermal Resistance (Typical, Note 1) θJA (oC/W)

SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC

Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 3 00oC

(SOIC - Lead Tips Only)

P-P

< 150mA 2.437 2.500 2.563 V

2-314

HIP6028

Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Refer to Figures 1, 2 and 3 (Continued)

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Slew Rate SR COMP = 10pF - 6 - V/µs

PWM CONTROLLER GATE DRIVER

Upper Drive Source I
Upper Drive Sink R
Lower Drive Source I
Lower Drive Sink R

UGATE

UGATEVUGATE-PHASE

LGATE

LGATEVLGATE

PROTECTION AND CONTROL

V

Over-Voltage Trip VSEN1 Rising 112 115 118 %

OUT1

FAULT Sourcing Current I
OCSET Current Source I
Soft-Start Current I
V

OUT1

V

OUT1

and V
and V

Disable Low Voltage - - 0.8 V

OUT3

Disable High Voltage 2.0 - - V

OUT3

OVP

OCSETVOCSET

SS

POWER GOOD

V

Upper Threshold VSEN1 Rising 108 - 110 %

OUT1

V

Under Voltage VSEN1 Rising 92 - 94 %

OUT1

V

Hysteresis (VSEN1 / DACOUT) Upper/Lower Threshold - 2 - %

OUT1

PGOOD Voltage Low V

PGOODIPGOOD

VCC = 12V, V

UGATE

(or V

) = 6V - 1 - A

GATE2

= 1V - 1.7 3.5 Ω

VCC = 12V, V

= 1V - 1 - A

LGATE

= 1V - 1.4 3.0 Ω

V

= 10V 10 14 - mA

FAULT

= 4.5V

DC

170 200 230 µA

-11- µA

= -4mA - - 0.5 V

Typical Performance Curves

1000

100

RESISTANCE (kΩ)

10

RT PULLUP
TO +12V

RT PULLDOWN TO V

10 100 1000

SWITCHING FREQUENCY (kHz)

FIGURE 4. RT RESISTANCE vs FREQUENCY FIGURE 5. BIAS SUPPLY CURRENT vs FREQUENCY

SS

100

80

60

(mA)

CC

I

40

20

0

100 200

C

UGATE

V

= 12V, VIN = 5V

VCC

= C

300 400

= C

LGATE

GATE

600 700 800 900

500

SWITCHING FREQUENCY (kHz)

C

C

GATE

C

GATE

C

GATE

= 4800pF

GATE

= 3600pF

= 1500pF

= 660pF

1000

2-315