Intersil Corporation HIP6021A Datasheet

HIP6021A

Data Sheet November 1999

Advanced PWM and Triple Linear Power
Controller

The HIP6021A provides the power control and protection for
four output voltages in high-performance, graphics intensive
microprocessor and computer applications. The IC
integrates a voltage-mode PWM controller and three linear
controllers, as well as the monitoring and protection
functions into a 28 lead SOIC package.

The synchronous-rectified buck converter includes an Intel­compatible, TTL 5-input digital-to-analog converter (DAC)
that adjusts the core PWM output voltage from 1.3V

2.05V

in 0.05V steps and from 2.1VDCto 3.5VDCin 0.1V

DC

DC

to

increments. The precision reference and voltage-mode
control provide ±1% static regulation. A TTL-compatible
signal applied to the SELECT pin dictates which method of
control is used for the AGP bus power: a low state results in
linear control of the AGP bus to 1.5V, while a high state
transitions theoutputthrough a linearly controlled softstart to

3.3V, followed by full enhancement of the external MOSFET
to pass the input voltage. The other two linear regulators
provide fixed output voltages of 1.5V GTL bus power and

1.8V power for the North/South Bridge core and/or cache
memory. These levels are user-adjustable by means of an
external resistor divider and pulling the FIX pin low. All linear
controllers can employ either N-Channel MOSFETs or
bipolar NPNs for the pass transistor.

The HIP6021A monitors all the output voltages. A single
Power Good signal is issued when the core is within ±10% of
the DAC setting and all other outputs are above their under­voltage levels. Additional built-in over-voltage protection for
the core output uses the lower MOSFET to prevent output
voltages above 115% of the DAC setting. The PWM
controller’s over-current function monitors the output current
by using the voltage drop across the upper MOSFET’s
r

DS(ON)

.

Ordering Information

TEMP.

PART NUMBER

HIP6021ACB 0 to 70 28 Ld SOIC M28.3
HIP6021EVAL1 Evaluation Board

RANGE (oC) PACKAGE

PKG.

NO.

File Number 4793

Features

• Provides 4 Regulated Voltages

- Microprocessor Core, AGP Bus, Memory, and GTL Bus
Power

• Drives N-Channel MOSFETs

• Linear Regulator Drives Compatible with both MOSFET
and Bipolar Series Pass Transistors

• Fixed or Externally Resistor-Adjustable Linear Outputs

• Simple Single-Loop Control Design

- Voltage-Mode PWM Control

• Fast PWM Converter Transient Response

- High-Bandwidth Error Amplifier

- Full 0% to 100% Duty Ratio

• Excellent Output Voltage Regulation

- Core PWM Output: ±1% Over Temperature

- Other Outputs: ±3% Over Temperature

• TTL-Compatible 5-Bit DAC Core Output Voltage Selection

- Shutdown Feature Removed When All Inputs High

- Wide Range 1.3VDC to 3.5V

DC

• Power-Good Output Voltage Monitor

• Over-Voltage and Over-Current Fault Monitors

- Switching Regulator Does Not Require Extra Current

Sensing Element, Uses Upper MOSFET’s r

DS(ON)

• Small Converter Size

- Constant Frequency Operation

- 200kHz Free-Running Oscillator; Programmable From

50kHz to Over 1MHz

- Small External Component Count

Applications

•

Motherboard Power Regulation for Computers

Pinout

DRIVE2

PGOOD

VSEN2

SELECT

FAULT/RT

VSEN4

HIP6021A (SOIC)

1
2

FIX

3

VID4

4

VID3

5

VID2

6

VID1

7

VID0

8
9

SD

10
11

SS

12
13
14

TOP VIEW

28
27
26
25
24
23
22
21
20
19
18
17
16
15

VCC
UGATE
PHASE
LGATE
PGND
OCSET
VSEN1
FB
COMP
VSEN3
DRIVE3
GND
VAUX
DRIVE4

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 407-727-9207

| Copyright © Intersil Corporation 1999

Block Diagram

OCSET

200µA

+

-

+

­PWM

COMP1

TTL D/A

CONVERTER

(DAC)

PWM1

x 1.10

x 0.90

x 1.15

ERROR

AMP1

DACOUT

VSEN1

+

-

+

-

+

-

OC1

+

-

VSEN3

VAUX

2

DRIVE3

DRIVE4

VSEN4

DRIVE2

VSEN2

SELECT

-

+

+

-

+

-

+

-

x 0.75

+

1.5V
OR

-

3.3V

IN

x 0.75

+

1.26V

-

­+

+

-

OSCILLATOR

FIX

LUV

LINEAR
UNDER-

VOLTAGE

INHIBIT

FAULT

SD

SOFT-

START

AND FAULT

LOGIC

28µA

OV

VCC

4.5V

VCC

POWER-ON

RESET (POR)

DRIVE1

GATE

CONTROL

SYNCH

DRIVE

VAUX

PGOOD

HIP6021A

VCC

UGATE

PHASE

VCC

LGATE

PGND

GND

FAULT / RT

SS

FB

COMP

VID0

VID1

VID2

VID4

VID3

Simplified Power System Diagram

+5V

IN

+3.3V

IN

Q3

V

OUT2

HIP6021A

LINEAR

CONTROLLER

HIP6021A

PWM

CONTROLLER

Q1

Q2

V

OUT1

V

Typical Application

+12V

IN

+5V

IN

+3.3V

IN

V

OUT2

1.5V OR 3.3V

TYPEDET

V

OUT3

1.5V

IN

L

IN

OUT3

Q4

C

IN

Q4

C

Q3

OUT2

DRIVE2

VSEN2

SELECT

VAUX

DRIVE3

VSEN3

LINEAR

CONTROLLER

HIP6021A

VCC

LINEAR

CONTROLLER

OCSET

PGOOD

UGATE
PHASE

LGATE
PGND

VSEN1

FB

COMP

Q2

Q1

Q5

L

OUT1

C

OUT1

V

OUT4

POWERGOOD

1.3V TO 3.5V

V

OUT1

V

OUT4

1.8V

C

C

OUT3

OUT4

Q5

FIX

DRIVE4

VSEN4

SS

C

SS

GND

FAULT / RT

VID0
VID1
VID2

VID3
VID4

3

HIP6021A

Absolute Maximum Ratings Thermal Information

Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +15V

PGOOD, RT/FAULT, DRIVE, PHASE,

and GATE Voltage . . . . . . . . . . . . . . . GND - 0.3V to VCC + 0.3V

Input, Output or I/O Voltage. . . . . . . . . . . . . . . . . . GND -0.3V to 7V

ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1

Operating Conditions

Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . +12V ±10%

Ambient Temperature Range. . . . . . . . . . . . . . . . . . . . 0oC to 70oC

Junction Temperature Range. . . . . . . . . . . . . . . . . . . 0oC to 125oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. θJA is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Refer to Block and Simplified Power System

Diagrams, and Typical Application Schematic

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

VCC SUPPLY CURRENT

Nominal Supply Current I

CC

POWER-ON RESET

Rising VCC Threshold V
Falling VCC Threshold V
Rising VAUX Threshold V
VAUX Threshold Hysteresis V
Rising V

Threshold - 1.26 - V

OCSET

OSCILLATOR

Free Running Frequency F

OSC

Total Variation 6kΩ < RT to GND < 200kΩ -15 - +15 %
Ramp Amplitude ∆V

OSC

DAC AND BANDGAP REFERENCE

DAC(VID0-VID4) Input Low Voltage - - 0.8 V
DAC(VID0-VID4) Input High Voltage 2.0 - - V
DACOUT Voltage Accuracy -1.0 - +1.0 %
Bandgap Reference Voltage V

BG

Bandgap Reference Tolerance -2.5 - +2.5 %

LINEAR REGULATORS (OUT2, OUT3, AND OUT4)

Regulation (All Linears) Except OUT2 when SELECT > 2.0V - 3 - %
VSEN2 Regulation Voltage VREG2SELECT < 0.8V - 1.5 - V
VSEN3 Regulation Voltage VREG
VSEN4 Regulation Voltage VREG
Under-Voltage Level (VSEN/VREG) VSEN
Under-Voltage Hysteresis (VSEN/VREG) VSEN Falling - 7 - %
Output Drive Current (All Linears) VAUX-V

UGATE, LGATE, DRIVE2, DRIVE3, and
DRIVE4 Open

OCSET
OCSET
OCSET
OCSET

RT = OPEN 185 200 215 kHz

RT = Open - 1.9 - V

3
4

VSEN Rising - 75 - %

UV

Thermal Resistance (Typical, Note 1) θJA (oC/W)

SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC

Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC

(SOIC - Lead Tips Only)

-9- mA

= 4.5V - - 10.4 V
= 4.5V 8.2 - - V
= 4.5V - 2.5 - V
= 4.5V - 0.5 - V

- 1.265 - V

- 1.5 - V

- 1.8 - V

> 0.6V 20 40 - mA

DRIVE

P-P

4

HIP6021A

Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Refer to Block and Simplified Power System

Diagrams, and Typical Application Schematic (Continued)

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

SYNCHRONOUS PWM CONTROLLER ERROR AMPLIFIER

DC Gain -88- dB
Gain-Bandwidth Product GBWP - 15 - MHz
Slew Rate SR COMP = 10pF - 6 - V/µs

PWM CONTROLLER GATE DRIVER

UGATE Source I
UGATE Sink R
LGATE Source I
LGATE Sink R

UGATE

UGATEVGATE-PHASE

LGATE

LGATE

PROTECTION

VSEN1 Over-Voltage (VSEN1/DACOUT) VSEN1 Rising - 115 120 %
FAULT Sourcing Current I
OCSET1 Current Source I
Soft-Start Current I

OVP

OCSET

SS

POWER GOOD

VSEN1 Upper Threshold
(VSEN1/DACOUT)

VSEN1 Under-Voltage
(VSEN1/DACOUT)

VSEN1 Hysteresis (VSEN1/DACOUT) Upper/Lower Threshold - 2 - %
PGOOD Voltage Low V

PGOODIPGOOD

VCC = 12V, V

= 6V - 1 - A

UGATE

= 1V - 1.7 3.5 Ω
VCC = 12V, V
V

= 1V - 1.4 3.0 Ω

LGATE

V

FAULT/RT

V

OCSET

= 2.0V - 8.5 - mA

= 4.5V

= 1V - 1 - A

LGATE

DC

170 200 230 µA

-28- µA

VSEN1 Rising 108 - 110 %

VSEN1 Rising 92 - 94 %

= -4mA - - 0.8 V

Typical Performance Curve

1000

100

RESISTANCE (kΩ)

10

RT PULLUP
TO +12V

RT PULLDOWN TO V

10 100 1000

SWITCHING FREQUENCY (kHz)

FIGURE 1. RT RESISTANCE vs FREQUENCY

SS

5