Intersil Corporation HIP6018 Datasheet

HIP6018
Data Sheet April 1998 File Number
Advanced PWM and Dual Linear Power Control
The HIP6018 provides the power control and protection for three output voltages in high-performance microprocessor and computer applications. The IC integrates a PWM controllers, a linear regulator and a linear controller as well as the monitoring and protection functions into a single package. The PWM controller regulates the microprocessor core voltage with a synchronous-rectified buck converter. The linear controller regulates power for the GTL bus and the linear regulator provides power fortheclock driver circuit.
The HIP6018 includes an Intel-compatible, TTL 5-input digital-to-analog converter (DAC)thatadjusts the core PWM output voltage from 2.1V and from 1.8V
to 2.05VDC in 0.05V steps. The precision
DC
reference and voltage-mode control provide±1% static regulation. The linear regulator uses an internal pass device to provide 2.5V±2.5%. The linear controller drives an external N-channel MOSFET to provide 1.5V±2.5%.
The HIP6018 monitors all the output voltages. A single Power Good signal is issued whenthecoreis within ±10% of the DAC setting and the other levels are above their under­voltage levels. Additional built-in over-voltage protection for the core output uses the lower MOSFET to prevent output voltages above 115% of the DAC setting. The PWM over­current function monitors the output current by using the voltage drop across the upper MOSFET’s r eliminating the need for a current sensing resistor.
to 3.5VDC in 0.1V increments
DC
DS(ON)
,
4497.1
Features
• Provides 3 Regulated Voltages
- Microprocessor Core, Clock and GTL Power
• Drives N-Channel MOSFETs
• Operates from +3.3V, +5V and +12V Inputs
• Simple Single-Loop PWM Control Design
- Voltage-Mode Control
• Fast Transient Response
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Ratios
• Excellent Output Voltage Regulation
- Core PWM Output: ±1% Over Temperature
- Other Outputs: ±2.5% Over Temperature
• TTL-compatible 5-Bit Digital-to-Analog Core Output Voltage Selection
- Wide Range . . . . . . . . . . . . . . . . . . . 1.8V
- 0.1V Steps . . . . . . . . . . . . . . . . . . . . 2.1VDC to 3.5V
- 0.05V Steps . . . . . . . . . . . . . . . . . . 1.8VDC to 2.05V
• Power-Good Output Voltage Monitor
• Microprocessor Core Voltage Protection Against Shorted MOSFET
• Over-Voltage and Over-Current Fault Monitors
- Does Not Require Extra Current Sensing Element,
Uses MOSFET’s r
DS(ON)
• Small Converter Size
- Constant Frequency Operation
- 200kHz Free-Running Oscillator; Programmable from
50kHz to over 1MHz
DC
to 3.5V
DC DC DC
Ordering Information
TEMP. RANGE
PART NUMBER
HIP6018CB 0 to 70 24 Ld SOIC M24.3 HIP6018EVAL1 Evaluation Board
(oC) PACKAGE
2-224
PKG.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
NO.
Applications
Full Motherboard Power Regulation for Computers
Low-Voltage Distributed Power Supplies
Pinout
HIP6018 (SOIC)
TOP VIEW
VCC
1 2
VID4 VID3
3
VID2
4 5
VID1 VID0
6
PGOOD
http://www.intersil.com or 407-727-9207
FAULT
SS RT
FB2
VIN2
7 8
9 10 11 12
| Copyright © Intersil Corporation 1999
24 23 22 21 20 19 18 17 16 15 14 13
UGATE1 PHASE1 LGATE1 PGND OCSET1 VSEN1 FB1 COMP1 FB3 DRIVE3 GND VOUT2
Block Diagram
HIP6018
VCC
OCSET1
VSEN1
3V
POWER-ON
RESET (POR)
200mA
110%
LINEAR
UNDER-
VOLTAGE
+
+
-
-
PGOOD
+
90%
-
+
DRIVE
LOWER
PGND
TTL D/A
4V
GND
CONVERTER
RT
OSCILLATOR
FB1 COMP1
VID4
VID3
(DAC)
VID2
VID1
VID0
UGATE1
PHASE1
VCC
DRIVE
UPPER
GATE
INHIBIT
-
+
OC1
-
+
115%
-
LUV
OC2
OV
+
SOFT-
LOGIC
START
AND FAULT
CONTROL
+
-
VCC
PWM
-
PWM
ERROR
DACOUT
LGATE1
COMP
AMP
11µA
FB3
2-225
0.3V
-
+
DRIVE3
-
+
INHIBIT
3V
VIN2
VCC
SS
1.26V
-
+
-
+
-
+
0.23A
FB2
VOUT2
FAULT
FIGURE 1.
Simplified Power System Diagram
+5V
IN
HIP6018
+3.3V
IN
V
V
Typical Application
+12V
IN
+5V
IN
+3.3V
IN
V
OUT2
2.5V C
OUT2
OUT2
OUT3
Q1
Q2
V
OUT1
Q3
LINEAR
REGULATOR
HIP6018
LINEAR
CONTROLLER
PWM1
CONTROLLER
FIGURE 2.
C
IN
VCC
VIN2
VOUT2
FB2
OCSET1
PGOOD
UGATE1 PHASE1
Q1
POWERGOOD
L
OUT1
V
OUT1
1.8V TO 3.5V
V
OUT3
1.5V C
Q3
OUT3
2-226
DRIVE3
FB3
VID0 VID1 VID2 VID3 VID4
HIP6018
GND
FIGURE 3.
LGATE1 PGND
VSEN1
FB1
COMP1
FAULT RT
SS
Q2
CR1
C
SS
C
OUT1
HIP6018
Absolute Maximum Ratings Thermal Information
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +15V
PGOOD, RT, FAULT, and GATE Voltage .GND - 0.3V to VCC + 0.3V
Input, Output or I/O Voltage. . . . . . . . . . . . . . . . . . GND -0.3V to 7V
Operating Conditions
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . +12V ±10%
Ambient Temperature Range. . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
Junction Temperature Range. . . . . . . . . . . . . . . . . . . . 0oC to 125oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Refer to Figures 1, 2 and 3
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
VCC SUPPLY CURRENT
Thermal Resistance (Typical, Note 1) θJA (oC/W)
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
SOIC Package (with 3 in2 of copper) . . . . . . . . . . . 65
Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC
Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
(SOIC - Lead Tips Only)
Nominal Supply I
POWER-ON RESET
Rising VCC Threshold V Falling VCC Threshold V Rising VIN2 Under-Voltage Threshold 2.45 2.55 2.65 V VIN2 Under-Voltage Hysteresis - 500 - mV Rising V
OSCILLATOR
Free Running Frequency RT = OPEN 185 200 215 kHz Total Variation 6k < RT to GND < 200k -15 - +15 % Ramp Amplitude V
REFERENCE and DAC
DAC(VID0-VID4) Input Low Voltage - - 0.8 V DAC(VID0-VID4) Input High Voltage 2.0 - - V DACOUT Voltage Accuracy -1.0 - +1.0 % Reference Voltage (Pin FB2 and FB3) 1.240 1.265 1.290 V
LINEAR REGULATOR
Threshold - 1.25 - V
OCSET1
CC
OSC
UGATE1, DRIVE3, LGATE1, and VOUT2 Open - 10 - mA
= 4.5V 8.6 - 10.4 V
OCSET
= 4.5V 8.2 - 10.2 V
OCSET
RT = Open - 1.9 - V
P-P
Regulation 10mA < I Under-Voltage Level FB2 Under-Voltage Hysteresis -6- % Over-Current Protection 180 230 - mA Over-current Protection During Start-Up 560 700 - mA
LINEAR CONTROLLER
Regulation VSEN3 = DRIVE3, 0 < I Under-Voltage Level FB3
FB2 Rising - 75 87 %
UV
FB3 Rising - 75 87 %
UV
< 150mA -2.5 - 2.5 %
VOUT2
< 20mA -2.5 - 2.5 %
DRIVE3
2-227
HIP6018
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Refer to Figures 1, 2 and 3 (Continued)
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Under-Voltage Hysteresis -6- % DRIVE3 Source Current VIN2 - DRIVE3 > 0.6V 20 40 - mA
PWM CONTROLLER ERROR AMPLIFIER
DC Gain -88- dB Gain-Bandwidth Product GBWP - 15 - MHz Slew Rate SR COMP = 10pF - 6 - V/µs
PWM CONTROLLER GATE DRIVER
Upper Drive Source I Upper Drive Sink R Lower Drive Source I Lower Drive Sink R
UGATE
UGATEVUGATE1-PHASE1
LGATE
LGATEVLGATE1
VCC = 12V, V
VCC = 12V, V
= 1V - 1.4 3.0
UGATE1
(or V
) = 6V - 1 - A
GATE2
= 1V - 1.7 3.5
= 1V - 1 - A
LGATE1
PROTECTION
Over-Voltage Trip VSEN1 Rising 112 115 118 %
V
OUT1
V
FAULT Sourcing Current I OCSET1 Current Source I Soft-Start Current I
OVP
OCSETVOCSET
SS
= 10V 10 14 - mA
FAULT
= 4.5V
DC
170 200 230 µA
-11- µA
Chip Shutdown Soft-Start Threshold - - 1.0 V
POWER GOOD
Upper Threshold VSEN1 Rising 108 - 110 %
V
OUT1
Under Voltage VSEN1 Rising 92 - 94 %
V
OUT1
Hysteresis (VSEN1 / DACOUT) Upper/Lower Threshold - 2 - %
V
OUT1
PGOOD Voltage Low V
PGOODIPGOOD
= -4mA - - 0.5 V
Typical Performance Curves
100
1000
100
RESISTANCE (k)
10
RT PULLUP TO +12V
RT PULLDOWN TO V
10 100 1000
SWITCHING FREQUENCY (kHz)
SS
80
60
(mA)
CC
I
40
20
0 100 200
C V
UGATE1
= 12V, VIN = 5V
VCC
= C
300 400
= C
LGATE1
SWITCHING FREQUENCY (kHz)
GATE
600 700 800 900
500
C
FIGURE 4. RT RESISTANCE vs FREQUENCY FIGURE 5. BIAS SUPPLY CURRENT vs FREQUENCY
2-228
GATE
C
C
C
GATE
= 4800pF
GATE
GATE
= 3600pF
= 1500pF
= 660pF
1000
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