Intersil Corporation HIP6017 Datasheet

HIP6017

Data Sheet April 1998 File Number

Advanced PWM and Dual Linear Power
Control

The HIP6017 provides the power control and protection for
three output voltages in high-performance microprocessor
and computer applications. The IC integrates a PWM
controller,a linear regulator and a linear controller as well as
the monitoring and protection functions into a single 28 lead
SOIC package. The PWM controller regulates the
microprocessor core voltage with a synchronous-rectified
buck converter. The linear controller regulates power for the
GTL bus and the linear regulator provides power for the
clock driver circuits.

The HIP6017 includes an Intel-compatible, TTL 5-input
digital-to-analog converter (DAC)that adjusts the core PWM
output voltage from 2.1V
and from 1.8V

to 2.05VDC in 0.05V steps. The precision

DC

to 3.5VDC in 0.1V increments

DC

reference and voltage-mode control provide±1% static
regulation. The linear regulator uses an internal pass device
to provide 2.5V ±2.5%. The linear controller drives an
external N-Channel MOSFET to provide 1.5V ±2.5%.

The HIP6017 monitors all the output voltages. A single
Power Good signal is issued when the core is within ±10% of
the DAC setting and the other levels are above their under­voltage levels. Additional built-in over-voltage protection for
the core output uses the lower MOSFET to prevent output
voltages above 115% of the DAC setting. The PWM over­current function monitors the output current by using the
voltage drop across the upper MOSFET’s r

DS(ON)

, thus

eliminating the need for a current sensing resistor.

Pinout

HIP6017 (SOIC)

TOP VIEW

28
27
26
25
24
23
22
21
20
19
18
17
16
15

VCC
UGATE1
PHASE1
LGATE1
PGND
OCSET1
VSEN1
FB1
COMP1
FB3
GATE3
GND
VOUT2
VIN2

NC

NC
VID4
VID3
VID2
VID1
VID0

PGOOD

GND2

V33

NC

SS

FAULT/RT

FB2

1
2
3
4
5
6
7
8

9
10
11
12
13
14

4496.1

Features

• Provides 3 Regulated Voltages

- Microprocessor Core, Clock and GTL Power

• Drives N-Channel MOSFETs

• Operates from +3.3V, +5V and +12V Inputs

• Simple Single-Loop PWM Control Design

- Voltage-Mode Control

• Fast Transient Response

- High-Bandwidth Error Amplifier

- Full 0% to 100% Duty Ratios

• Excellent Output Voltage Regulation

- Core PWM Output: ±1% Over Temperature

- Other Outputs: ±2.5% Over Temperature

• TTL-Compatible 5-Bit Digital-to-Analog Core Output
Voltage Selection

- Wide Range . . . . . . . . . . . . . . . . . . . 1.8V

DC

to 3.5V

- 0.1V Steps . . . . . . . . . . . . . . . . . . . . 2.1VDC to 3.5V

- 0.05V Steps . . . . . . . . . . . . . . . . . . 1.8VDC to 2.05V

• Power-Good Output Voltage Monitor

• Microprocessor Core Voltage Protection Against Shorted
MOSFET

• Over-Voltage and Over-Current Fault Monitors

- Does Not Require Extra Current Sensing Element,

Uses MOSFET’s r

DS(ON)

• Small Converter Size

- Constant Frequency Operation

- 200kHz Free-Running Oscillator; Programmable from

50kHz to over 1MHz

Applications

•

Full Motherboard Power Regulation for Computers

•

Low-Voltage Distributed Power Supplies

Ordering Information

TEMP. RANGE

PART NUMBER

HIP6017CB 0 to 70 28 Ld SOIC M28.3
HIP6017EVAL1 Evaluation Board

(oC) PACKAGE PKG. NO.

DC
DC
DC

2-210

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

Block Diagram

2-211

V33

VIN2

VOUT2

FB2

FAULT

GATE3

0.23A

VIN2

2.5V

FB3

11µA

4V

+

-

+

-

LINEAR
UNDER-

VOLTAGE

OC2

CONVERTER

SOFT-

START

& FAULT

LOGIC

TTL D/A

(DAC)

LUV

OV

DACOUT

-

+

+

-

+

-

-

+

+

-

+

+

4.3V

-

0.3V

+

INHIBIT

+

1.26V

-

-

VCC

VSEN1

110%

90%

115%

+

-

+

-

+

-

+

-

ERROR

AMP

OC1

OCSET1

200µA

+

-

+

-

PWM

COMP

OSCILLATOR

INHIBIT

PWM

VCC

POWER-ON

RESET (POR)

UPPER

DRIVE

GATE

CONTROL

LOWER

DRIVE

VCC

VCC

PGOOD

HIP6017

UGATE1

PHASE1

LGATE1

PGND

GND

GND2

SS

VID0

VID1

VID2

VID3

VID4

FIGURE 1.

FB1 COMP1

RT

Simplified Power System Diagram

+5V

IN

+3.3V

IN

V

OUT2

V

OUT3

Typical Application

HIP6017

LINEAR

REGULATOR

HIP6017

LINEAR

CONTROLLER

FIGURE 2.

PWM1

CONTROLLER

V

OUT1

+12V

+5V

+3.3V

V

OUT2

2.5V

V

OUT3

1.5V

IN

IN

IN

C

OUT2

C

OUT3

Q3

L

IN

C

IN

VCC

VIN2

V33

VOUT2

FB2

DRIVE3

FB3

VID0
VID1
VID2
VID3
VID4

HIP6017

OCSET1

PGOOD

UGATE1
PHASE1

LGATE1
PGND

VSEN1

FB1

COMP1

FAULT/RT

SS

Q1

Q2

CR1

L

OUT1

C

OUT1

POWERGOOD

V

OUT1

1.8V TO 3.5V

2-212

GND

FIGURE 3.

GND2

C

SS

HIP6017

Absolute Maximum Ratings Thermal Information

Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +15V

PGOOD, R T, FA ULT, and GATE Voltage . . . GND - 0.3V to VCC + 0.3V

Input, Output or I/O Voltage. . . . . . . . . . . . . . . . . . GND -0.3V to 7V

Operating Conditions

Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . +12V ±10%

Ambient Temperature Range. . . . . . . . . . . . . . . . . . . . . 0oC to 70oC

Junction Temperature Range. . . . . . . . . . . . . . . . . . . . 0oC to 125oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. θJA is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Refer to Figures 1, 2 and 3

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

VCC SUPPLY CURRENT

Nominal Supply I

POWER-ON RESET

Rising VCC Threshold V
Falling VCC Threshold V
Rising VIN2 Under-Voltage Threshold 2.45 2.55 2.65 V
VIN2 Under-Voltage Hystersis - 500 - mV
Rising V

OSCILLATOR

Free Running Frequency RT = OPEN 185 200 215 kHz
Total Variation 6kΩ < RT to GND < 200kΩ -15 - +15 %
Ramp Amplitude ∆V

REFERENCE AND DAC

DAC(VID0-VID4) Input Low Voltage - - 0.8 V
DAC(VID0-VID4) Input High Voltage 2.0 - - V
DACOUT Voltage Accuracy -1.0 - +1.0 %
Reference Voltage (Pin FB2 and FB3) 1.240 1.265 1.290 V

LINEAR REGULATOR

Regulation 10mA < I
Under Voltage Level FB2
Under Voltage Hysteresis -6- %
Over Current Protection 180 230 - mA
Over Current Protection During Start-Up 560 700 - mA

LINEAR CONTROLLER

Regulation VSEN3 = DRIVE3, 0 < I
Under Voltage Level FB3
Under Voltage Hysteresis -6- %
Output Drive Current I

PWM CONTROLLER ERROR AMPLIFIER

DC Gain -88- dB
Gain-Bandwidth Product GBWP - 15 - MHz

Threshold - 1.25 - V

OCSET1

CC

DRIVE3

UGATE1, DRIVE3, LGATE1, and VOUT4 Open - 10 - mA

= 4.5V 8.6 - 10.4 V

OCSET

= 4.5V 8.2 - 10.2 V

OCSET

RT = Open - 1.9 - V

OSC

VOUT2

FB2 Rising - 75 87 %

UV

FB3 Rising - 75 87 %

UV

VIN2 - V

DRIVE3

Thermal Resistance (Typical, Note 1) θJA (oC/W)

SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

SOIC Package (with 3 in2 of copper) . . . . . . . . . . . 50

Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC

Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC

(SOIC - Lead Tips Only)

P-P

< 150mA -2.5 - +2.5 %

< 20mA -2.5 - +2.5 %

DRIVE3

> 0.6V 20 40 - mA

2-213

HIP6017

Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Refer to Figures 1, 2 and 3 (Continued)

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Slew Rate SR COMP = 10pF - 6 - V/µs

PWM CONTROLLER GATE DRIVER

Upper Drive Source I
Upper Drive Sink R
Lower Drive Source I
Lower Drive Sink R

UGATE

UGATEVUGATE1-PHASE1

LGATE

LGATEVLGATE1

PROTECTION

V

Over-Voltage Trip VSEN1 Rising 112 115 118 %

OUT1

FAULT Sourcing Current I
OCSET1 Current Source I
Soft-Start Current I

OVP

OCSETVOCSET

SS

Chip Shutdown Soft-Start Threshold - - 1.0 V

POWER GOOD

V

Upper Threshold VSEN1 Rising 108 - 110 %

OUT1

V

Under-Voltage (Lower Threshold) VSEN1 Rising 92 - 94 %

OUT1

V

Hysteresis (VSEN1/DACOUT) Upper/Lower Threshold - 2 - %

OUT1

PGOOD Voltage Low V

PGOODIPGOOD

VCC = 12V, V

= 6V - 1 - A

UGATE1

= 1V - 1.7 3.5 Ω

VCC = 12V, V

= 1V - 1 - A

LGATE1

= 1V - 1.4 3.0 Ω

V

FAULT/RT

= 10V 10 14 - mA

= 4.5V

DC

170 200 230 µA

-11- µA

= -4mA - - 0.5 V

Typical Performance Curves

1000

100

RESISTANCE (kΩ)

10

RT PULLUP

TO +12V

RT PULLDOWN TO V

10 100 1000

SWITCHING FREQUENCY (kHz)

SS

FIGURE 4. RT RESISTANCE vs FREQUENCY FIGURE 5. BIAS SUPPLY CURRENT vs FREQUENCY

Functional Pin Descriptions

VSEN1 (Pin 22)

This pin is connected to the PWM converter’s output voltage.
The PGOOD and OVP comparator circuits use this signal to
report output voltage status and for over-voltage protection.

OCSET1 (Pin 23)

Connect a resistor (R
respective upper MOSFET. R
current source (I

OCSET

) from this pin to the drain of the

OCSET

, an internal 200µA

OCSET

), and the upper MOSFET on-

100

C

UGATE1

V

VCC

80

60

(mA)

CC

I

40

20

0

100 200

resistance (r

= C

= 12V, VIN = 5V

300 400

DS(ON)

= C

LGATE1

SWITCHING FREQUENCY (kHz)

GATE

500

) set the converter over-current (OC) trip

C

= 4800pF

GATE

C

= 3600pF

GATE

C

= 1500pF

GATE

C

= 660pF

GATE

600 700 800 900

1000

point according to the following equation:

I

I

PEAK

OCSETxROCSET

-------------------------------------------------=

r

DS ON()

An over-current trip cycles the soft-start function. Sustaining
an over-current for 2 soft-start intervals shuts down the IC.

Additionally, OCSET1 is an output for the inverted FAULT
signal (

FAULT). If a fault condition causes FAULT to go high,
OCSET1 will be simultaneously pulled to ground though an
internal MOS device (typical r

DS(ON)

= 100Ω).

2-214