Intersil Corporation HIP6014 Datasheet

HIP6014

Data Sheet March 2000

Buck and Synchronous-Rectifier (PWM)
Controller and Output Voltage Monitor

The HIP6014 provides complete control and protection for a
DC-DC converter optimized for high-perf ormance
microprocessor applications. It is designed to drive two
N-ChannelMOSFETsinasynchronous-rectifiedbucktopology.
The HIP6014 integrates all of the control, output adjustment,
monitoring and protection functions into a single package.

The output voltage of the converter is easily adjusted and
precisely regulated. The HIP6014 includes a fully TTL­compatible 5-input digital-to-analog converter (DAC) that
adjusts the output voltage from 2.1V
increments and from 1.8V

to 2.05VDC in 0.05V steps.

DC

to 3.5VDC in 0.1V

DC

The precision reference and voltage-mode regulator hold the
selected output voltage to within ±1% over temperature and
line voltage variations.

The HIP6014 provides simple, single feedbackloop, voltage­mode control with fast transient response. It includes a
200kHz free-running triangle-wave oscillator that is
adjustable from below 50kHz to over 1MHz. The error
amplifier features a 15MHz gain-bandwidth product and
6V/µs slew rate which enables high converter bandwidth for
fast transient performance. The resulting PWM duty ratio
ranges from 0% to 100%.

The HIP6014 monitors the output voltage with a window
comparator that tracks the DAC output and issues a Power
Good signal when the output is within ±10%. The HIP6014
protects against over-current and over-voltage conditions by
inhibiting PWM operation. Additional built-in over-voltage
protection triggers an external SCR to crowbar the input
supply. The HIP6014 monitors the current by using the
r

DS(ON)

of the upper MOSFET which eliminates the need for

a current sensing resistor.

Pinout

HIP6014

(SOIC)

TOP VIEW

File Number 4420.2

Features

• Drives Two N-Channel MOSFETs

• Operates from +5V or +12V Input

• Simple Single-Loop Control Design

- Voltage-Mode PWM Control

• Fast Transient Response

- High-Bandwidth Error Amplifier

- Full 0% to 100% Duty Ratio

• Excellent Output Voltage Regulation

- ±1% Over Line Voltage and Temperature

• TTL-Compatible 5-Bit Digital-to-Analog Output
Voltage Selection

- Wide Range . . . . . . . . . . . . . . . . . . . 1.8V

DC

to 3.5V

- 0.1V Binary Steps. . . . . . . . . . . . . . . 2.1VDC to 3.5V

- 0.05V Binary Steps. . . . . . . . . . . . . 1.8VDC to 2.05V

• Power-Good Output Voltage Monitor

• Over-Voltage and Over-Current Fault Monitors

- Does Not Require Extra Current Sensing Element,

Uses MOSFET’s r

DS(ON)

• Small Converter Size

- Constant Frequency Operation

- 200kHz Free-Running Oscillator Programmable from

50kHz to over 1MHz

Applications

•

•

•

Supply for Pentium®, Pentium Pro, PentiumII,

Power
PowerPC™, K6™, 6X86™ and Alpha™ Microprocessors

High-Power 5V to 3.xV DC-DC Regulators
Low-Voltage Distributed Power Supplies

Ordering Information

TEMP.

PART NUMBER

HIP6014CB 0 to 70 20 Ld SOIC M20.3

RANGE (oC) PACKAGE

PKG.

DC
DC
DC

NO.

V

SEN

OCSET

SS
VID0
VID1
VID2
VID3
VID4

COMP

FB

1
2
3
4
5
6
7
8
9

10

1

20
19
18
17
16
15
14
13
12
11

RT
OVP
V

CC

LGATE
PGND
BOOT
UGATE
PHASE
PGOOD
GND

6X86TM is a trademark of Cyrix Corporation.

TM

is a trademark of Digital Equipment Corporation.

Alpha

TM

is a trademark of Advanced Micro Devices, Inc.

K6

Pentium® is a registered trademark of Intel Corporation.

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143

| Copyright © Intersil Corporation 2000

PowerPC

TM

is a trademark of IBM.

Typical Application

PGOOD

SS

OVP

12V

V

CC

MONITOR AND

PROTECTION

HIP6014

VIN = +5V OR +12V

OCSET
EN
BOOT

Block Diagram

V

SEN

OCSET

VID0
VID1
VID2
VID3
VID4

FB

COMP

RT

RT

VID0
VID1
VID2
VID3
VID4

FB

REFERENCE

TTL D/A

CONVERTER

(DAC)

D/A

OSC

HIP6014

+

-

COMP

200µA

DACOUT

-

+

110%

90%

115%

V

SEN

+

-

ERROR

AMP

UGATE
PHASE

LGATE
PGND

GND

+

-

+

-

OVER-

VOLTAGE

+

-

+

-

OVER-

CURRENT

COMPARATOR

OSCILLATOR

4V

PWM

+

-

V

CC

POWER-ON

RESET (POR)

SOFT-

START

INHIBIT

PWM

GATE

CONTROL

LOGIC

+V

OUT

10µA

PGOOD

OVP

SS

BOOT
UGATE

PHASE

LGATE
PGND
GND

2

HIP6014

Absolute Maximum Ratings Thermal Information

Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +15V

Boot Voltage, V

BOOT

- V

. . . . . . . . . . . . . . . . . . . . . . . . +15V

PHASE

Input, Output or I/O Voltage. . . . . . . . . . . .GND -0.3V to VCC +0.3V

ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Class 2

Operating Conditions

Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . +12V ±10%

Ambient Temperature Range. . . . . . . . . . . . . . . . . . . . . 0oC to 70oC

Junction Temperature Range. . . . . . . . . . . . . . . . . . . .0oC to 125oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief 379 for details.

Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

V

SUPPLY CURRENT

CC

Nominal Supply I

CC

POWER-ON RESET

Rising VCC Threshold V
Falling VCC Threshold V
Rising V

Threshold - 1.26 - V

OCSET

OSCILLATOR

Free Running Frequency RT = OPEN 185 200 215 kHz
Total Variation 6kΩ < RT to GND < 200kΩ -15 - +15 %
Ramp Amplitude ∆V

OSC

REFERENCE AND DAC

DAC(VID0-VID4) Input Low Voltage - - 0.8 V
DAC(VID0-VID4) Input High Voltage 2.0 - - V
DACOUT Voltage Accuracy -1.0 - +1.0 %

ERROR AMPLIFIER

DC Gain -88- dB
Gain-Bandwidth Product GBW - 15 - MHz
Slew Rate SR COMP = 10pF - 6 - V/µs

GATE DRIVERS

Upper Gate Source I
Upper Gate Sink R
Lower Gate Source I
Lower Gate Sink R

UGATE

UGATEILGATE

LGATE

LGATEILGATE

PROTECTION

Over-Voltage Trip (V
OCSET Current Source I
OVP Sourcing Current I
Soft Start Current I

/DACOUT) - 115 120 %

SEN

OCSETVOCSET

OVP

SS

POWER GOOD

Upper Threshold (V
Lower Threshold (V
Hysteresis (V

SEN

PGOOD Voltage Low V

/DACOUT) V

SEN

/DACOUT) V

SEN

/DACOUT) Upper and Lower Threshold - 2 - %

PGOODIPGOOD

UGATE and LGATE Open - 5 - mA

OCSET
OCSET

RT = Open - 1.9 - V

V

- V

BOOT

= 0.3A - 5.5 10 Ω

VCC = 12V, V

= 0.3A - 3.5 6.5 Ω

V

= 5.5V, V

SEN

Rising 106 - 111 %

SEN

Falling 89 - 94 %

SEN

Thermal Resistance (Typical, Note 1) θJA (oC/W)

SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118

Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC

Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC

(SOIC - Lead Tips Only)

= 4.5V - - 10.4 V
= 4.5V 8.2 - - V

PHASE

= 4.5V

= 12V, V

= 6V 300 450 - mA

LGATE

DC

= 0V 60 - - mA

OVP

= 6V 350 500 - mA

UGATE

170 200 230 µA

-10- µA

= -5mA - 0.5 - V

P-P

3

Typical Performance Curves

1000

100

RESISTANCE (kΩ)

10

RT PULLUP
TO +12V

RT PULLDOWN TO V

10 100 1000

SWITCHING FREQUENCY (kHz)

FIGURE 1. RT RESISTANCE vs FREQUENCY FIGURE 2. BIAS SUPPLY CURRENT vs FREQUENCY

Functional Pin Description

V

SEN

OCSET

SS
VID0
VID1
VID2
VID3
VID4

COMP

FB

1
2
3
4
5
6
7
8
9

10

20
19
18
17
16
15
14
13
12
11

RT
OVP
VCC
LGATE
PGND
BOOT
UGATE
PHASE
PGOOD
GND

SS

HIP6014

80

C

= 3300pF

70

60

C

= C

UPPER

50

(mA)

40

CC

I

30

20

10

0

100 200 300 400 500 600 700 800 900 1000

= C

LOWER

SWITCHING FREQUENCY (kHz)

GATE

GATE

C

C

GATE

GATE

= 1000pF

= 10pF

VID0-4 (Pins 4-8)

VID0-4 are the input pins to the 5-bit DAC. The states of
these five pins program the internal voltage reference
(DACOUT). The level of DACOUT sets the converter output
voltage. It also sets the PGOOD and OVP thresholds. Table
1 specifies DACOUT for the 32 combinations of DAC inputs.

COMP (Pin 9) and FB (Pin 10)

COMP and FB are the available external pins of the error
amplifier. The FB pin is the inverting input of the error
amplifier and the COMP pin is the error amplifier output.
These pins are used to compensate the voltage-control
feedback loop of the converter.

V

(Pin 1)

SEN

This pin is connected to the converters output voltage. The
PGOOD and OVP comparator circuits use this signal to
report output voltage status and for overvoltage protection.

OCSET (Pin 2)

Connect a resistor (R
upper MOSFET. R
(I

), and the upper MOSFET on-resistance (r

OCS

OCSET

the converter over-current (OC) trip point according to the
following equation:

I

•

I

PEAK

OCSROCSET

------------------------------------------- -=

r

DS ON()

An over-current trip cycles the soft-start function.

) from this pin to the drain of the

OCSET

, an internal 200µA current source

DS(ON)

) set

SS (Pin 3)

Connect a capacitor from this pin to ground. This capacitor,
along with an internal 10µA current source, sets the soft­start interval of the converter.

4

GND (Pin 11)

Signal ground for the IC. All voltagelevelsaremeasured with
respect to this pin

PGOOD (Pin 12)

PGOOD is an open collector output used to indicate the
status of the converter output voltage. This pin is pulled low
when the converter output is not within ±10% of the
DACOUT reference voltage. Exception to this behavior are
the cases where the VID pins combination yield a 0V
converter output; in these cases PGOOD asserts a high
level.

PHASE (Pin 13)

Connect the PHASE pin to the upper MOSFET source. This
pin is used to monitor the voltage drop across the MOSFET
for over-current protection. This pin also provides the return
path for the upper gate drive.

UGATE (Pin 14)

Connect UGATE to the upper MOSFET gate. This pin
provides the gate drive for the upper MOSFET.