Intersil Corporation HIP6004DCB, HIP6004D Datasheet

TM
HIP6004D
Data Sheet April 2000
Buck and Synchronous-Rectifier (PWM) Controller and Output Voltage Monitor
The HIP6004D provides complete control and protection for a DC-DC converter optimized for high-performance microprocessor applications. It is designed to drive two N-Channel MOSFETs in a synchronous-rectified buck topology. The HIP6004D integrates all of the control, output adjustment, monitoring and protection functions into a single package.
The output voltage of the converter is easily adjusted and precisely regulated. The HIP6004D includes a fully TTL­compatible 5-input digital-to-analog converter (DAC) that adjusts the output voltage from 1.1V increments steps.The precision referenceand voltage-mode regulator hold the selected output voltage to within ±1% over temperature and line voltage variations.
The HIP6004D provides simple, single feedback loop, voltage-modecontrol with fasttransient response. It includes a 200kHz free-running triangle-wave oscillator that is adjustable from below 50kHz to over 1MHz. The error amplifier features a 15MHz gain-bandwidth product and 6V/µs slew rate which enables high converter bandwidth for fast transient performance. The resulting PWM duty ratio ranges from 0% to 100%.
to 1.85VDCin 25mV
DC
File Number 4855
Features
• Drives Two N-Channel MOSFETs
• Operates from +5V or +12V Input
• Simple Single-Loop Control Design
- Voltage-Mode PWM Control
• Fast Transient Response
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Ratio
• Excellent Output Voltage Regulation
- ±1% Over Line Voltage and Temperature
• TTL-Compatible 5-Bit Digital-to-Analog Output Voltage Selection
- 25mV Binary Steps . . . . . . . . . 1.100V
• Power-Good Output Voltage Monitor
• Over-Voltage and Over-Current Fault Monitors
- Does Not Require Extra Current Sensing Element,
Uses MOSFET’s r
DS(ON)
• Small Converter Size
- Constant Frequency Operation
- 200kHz Free-Running Oscillator Programmable from
50kHz to over 1MHz
to 1.850V
DC
DC
The HIP6004D monitors the output voltage with a window comparator that tracks the DAC output and issues a Power Good signal when the output is within±10%. The HIP6004D protects against over-current and overvoltage conditions by inhibiting PWM operation. Additional built-in overvoltage protection triggers an external SCR to crowbar the input supply. The HIP6004D monitors the current by using the r
DS(ON)
of the upper MOSFET which eliminates the need for
a current sensing resistor.
Ordering Information
TEMP.
PART NUMBER
HIP6004DCB 0 to 70 20 Ld SOIC M20.3
NOTE: When ordering, use the entire part number. Add the suffix T to obtain the part in tape and reel, e.g., HIP6004DCB-T.
RANGE (oC) PACKAGE
PKG.
NO.
Applications
• Power Supply for K7™, and Other Microprocessors
High-Power DC-DC Regulators
Low-Voltage Distributed Power Supplies
Pinout
HIP6004D
(SOIC)
TOP VIEW
VSEN
OCSET
SS VID0 VID1 VID2 VID3 VID4
COMP
FB
1 2 3 4 5 6 7 8 9
10
20 19 18 17 16 15 14 13 12 11
RT OVP VCC LGATE PGND BOOT UGATE PHASE PGOOD GND
1
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
K7™ is a trademark of Advanced Micro Devices, Inc.
Typical Application
PGOOD
SS
OVP
+12V
HIP6004D
MONITOR AND
PROTECTION
VCC
HIP6004D
VIN = +5V OR +12V
OCSET EN BOOT
Block Diagram
VSEN
OCSET
RT
VID0 VID1 VID2 VID3 VID4
FB
REFERENCE
D/A
OSC
+
-
COMP
200µA
-
+
110%
90%
115%
VSEN
UGATE PHASE
LGATE PGND
GND
+
-
+
-
OVER-
VOLTAGE
+
-
+
-
OVER-
CURRENT
4V
VCC
POWER-ON
RESET (POR)
SOFT-
START
10µA
+V
OUT
PGOOD
OVP
SS
BOOT UGATE
VID0 VID1 VID2 VID3 VID4
FB
COMP
RT
TTL D/A
CONVERTER
(DAC)
2
DACOUT
+
-
ERROR
AMP
PWM
COMPARATOR
+
-
OSCILLATOR
INHIBIT
PWM
PHASE
GATE
CONTROL
LOGIC
LGATE PGND GND
HIP6004D
Absolute Maximum Ratings Thermal Information
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +15V
Boot Voltage, V
BOOT
- V
. . . . . . . . . . . . . . . . . . . . . . . . +15V
PHASE
Input, Output or I/O Voltage. . . . . . . . . . . .GND -0.3V to VCC +0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Class 2
Operating Conditions
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . +12V ±10%
Ambient Temperature Range. . . . . . . . . . . . . . . . . . . . .0oC to 70oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
VCC SUPPLY CURRENT
Nominal Supply I
CC
POWER-ON RESET
Rising VCC Threshold V Falling VCC Threshold V Rising V
Threshold - 1.26 - V
OCSET
OSCILLATOR
Free Running Frequency RT = OPEN 185 200 215 kHz Total Variation 6k < RT to GND < 200k -15 - +15 % Ramp Amplitude V
OSC
REFERENCE AND DAC
DAC (VID0-VID4) Input Low Voltage - - 0.8 V DAC (VID0-VID4) Input High Voltage 2.0 - - V DACOUT Voltage Accuracy -1.0 - +1.0 %
ERROR AMPLIFIER
DC Gain -88- dB Gain-Bandwidth Product GBWP - 15 - MHz Slew Rate SR COMP = 10pF - 6 - V/µs
GATE DRIVERS
Upper Gate Source I Upper Gate Sink R Lower Gate Source I Lower Gate Sink R
UGATE
UGATEILGATE
LGATE
LGATEILGATE
PROTECTION
Over-Voltage Trip (VSEN/DACOUT) - 115 120 % OCSET Current Source I OVP Sourcing Current I Soft Start Current I
OCSETVOCSET
OVP
SS
POWER GOOD
Upper Threshold (VSEN/DACOUT) VSEN Rising 106 - 111 % Lower Threshold (VSEN/DACOUT) VSEN Falling 89 - 94 % Hysteresis (VSEN/DACOUT) Upper and Lower Threshold - 2 - % PGOOD Voltage Low V
PGOODIPGOOD
UGATE and LGATE Open - 5 - mA
OCSET OCSET
RT = Open - 1.9 - V
V
- V
BOOT
= 0.3A - 5.5 10
VCC = 12V, V
= 0.3A - 3.5 6.5
V
= 5.5V, V
SEN
Thermal Resistance (Typical, Note 1) θJA (oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
SOIC Package (with 3in2 of Copper) . . . . . . . . . . . . 86
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
= 4.5V - - 10.4 V = 4.5V 8.2 - - V
PHASE
= 4.5V
= 12V, V
= 6V 300 450 - mA
LGATE
DC
= 0V 60 - - mA
OVP
= 6V 350 500 - mA
UGATE
170 200 230 µA
-10- µA
= -5mA - 0.5 - V
P-P
3
Typical Performance Curves
1000
100
RESISTANCE (k)
10
RT PULLUP
TO +12V
RT PULLDOWN TO V
SS
HIP6004D
(mA)
CC
I
80
C
70
60
C
= C
UPPER
50
40
30
20
10
LOWER
= C
GATE
GATE
C
C
= 3300pF
= 1000pF
GATE
= 10pF
GATE
10 100 1000
SWITCHING FREQUENCY (kHz)
FIGURE 1. RT RESISTANCE vs FREQUENCY FIGURE 2. BIAS SUPPLY CURRENT vs FREQUENCY
Functional Pin Descriptions
1
VSEN
OCSET
SS VID0 VID1 VID2 VID3 VID4
COMP
FB
2 3 4 5 6 7 8 9
10
VSEN (Pin 1)
This pin is connected to the converter’s output voltage. The PGOOD and OVP comparator circuits use this signal to report output voltage status and for overvoltage protection.
OCSET (Pin 2)
Connect a resistor (R upper MOSFET. R (I
), and the upper MOSFET on-resistance (r
OCS
OCSET
the converter over-current (OC) trip point according to the following equation:
I
I
PEAK
OCSETxROCSET
---------------------------------------------------- -=
r
DS ON()
An over-current trip cycles the soft-start function.
) from this pin to the drain of the
OCSET
, an internal 200µA current source
SS (Pin 3)
Connect a capacitor from this pin to ground. This capacitor, along with an internal 10µA current source, sets the soft­start interval of the converter.
VID0-4 (Pins 4-8)
VID0-4 are the input pins to the 5-bit DAC. The states of these five pins program the internal voltage reference
20 19 18 17 16 15 14 13 12 11
RT OVP VCC LGATE PGND BOOT UGATE PHASE PGOOD GND
DS(ON)
) set
0
100 200 300 400 500 600 700 800 900 1000
SWITCHING FREQUENCY (kHz)
(DACOUT). The level of DACOUT sets the converter output voltage. It also sets the PGOOD and OVP thresholds. Table 1 specifies DACOUT for the all combinations of DAC inputs.
COMP (Pin 9) and FB (Pin 10)
COMP and FB are the available external pins of the error amplifier. The FB pin is the inverting input of the error amplifier and the COMP pin is the error amplifier output. These pins are used to compensate the voltage-control feedback loop of the converter.
GND (Pin 11)
Signal ground for the IC. All voltage levelsare measured with respect to this pin.
PGOOD (Pin 12)
PGOOD is an open collector output used to indicate the status of the converter output voltage. This pin is pulled low when the converter output is not within ±10% of the DACOUT reference voltage. Exception to this behavior is the ‘11111’ VID pin combination which disables the converter; in this case PGOOD asserts a high level.
PHASE (Pin 13)
Connect the PHASE pin to the upper MOSFET source. This pin is used to monitor the voltage drop across the MOSFET for over-current protection. This pin also provides the return path for the upper gate drive.
UGATE (Pin 14)
Connect UGATE to the upper MOSFET gate. This pin provides the gate drive for the upper MOSFET.
BOOT (Pin 15)
This pin provides bias voltage to the upper MOSFET dr iver. A bootstrap circuit may be used to create a BOOT voltage suitable to drive a standard N-Channel MOSFET.
4
Loading...
+ 7 hidden pages