intersil HIP6004B DATA SHEET

®

HIP6004B

Data Sheet October 2003 FN4567.3

Buck and Synchronous-Rectifier (PWM)
Controller and Output Voltage Monitor

The HIP6004B provides complete control and protection for
a DC-DC converter optimized for high-performance
microprocessor applications. It is designed to drive two
N-Channel MOSFETs in a synchronous-rectified buck
topology. The HIP6004B integrates all of the control, output
adjustment, monitoring and protection functions into a single
package.

The output voltage of the converter is easily adjusted and
precisely regulated. The HIP6004B includes a fully
TTL-compatible 5-input digital-to-analog converter (DAC)
that adjusts the output voltage from 1.3V

0.05V and from 2.1V

to 3.5VDC in 0.1V increments steps.

DC

to 2.05VDC in

DC

The precision reference and voltage-mode regulator hold the
selected output voltage to within ±1% over temperature and
line voltage variations.

The HIP6004B provides simple, single feedback loop,
voltage-mode control with fast transient response. It includes
a 200kHz free-running triangle-wave oscillator that is
adjustable from below 50kHz to over 1MHz. The error
amplifier features a 15MHz gain-bandwidth product and
6V/µs slew rate which enables high converter bandwidth for
fast transient performance. The resulting PWM duty ratio
ranges from 0% to 100%.

The HIP6004B monitors the output voltage with a window
comparator that tracks the DAC output and issues a Power
Good signal when the output is within ±10%. The HIP6004B
protects against over-current and overvoltage conditions by
inhibiting PWM operation. Addi t io n al bu i lt - i n overvoltage
protection triggers an external SCR to crowbar the input
supply. The HIP6004B monitors the current by using the
r

of the upper MOSFET which eliminates the need for

DS(ON)

a current sensing resistor.

Ordering Information

PART NUMBER

HIP6004BCB 0 to 70 20 Ld SOIC M20.3
HIP6004BCV 0 to 70 20 Ld TSSOP M20.173
HIP6004BCR 0 to 70 20 Ld 5x5 QFN L20.5x5

TEMP.

RANGE (oC) PACKAGE

PKG.

DWG. #

Features

• Drives Two N-Channel MOSFETs

• Operates from +5V or +12V Input

• Simple Single-Loop Control Design

- Voltage-Mode PWM Control

• Fast Transient Response

- High-Bandwidth Error Amplifier

- Full 0% to 100% Duty Ratio

• Excellent Output Voltage Regulation

- ±1% Over Line Voltage and Temperature

• TTL-Compatible 5-Bit Digital-to-Analog Output
Voltage Selection

- Wide Range . . . . . . . . . . . . . . . . . . . 1.3V

DC

to 3.5V

- 0.1V Binary Steps . . . . . . . . . . . . . . 2.1VDC to 3.5V

- 0.05V Binary Steps . . . . . . . . . . . . 1.3VDC to 2.05V

• Power-Good Output Voltage Monitor

• Over-Voltage and Over-Current Fault Monitors

- Does Not Require Extra Current Sensing Element,

Uses MOSFET’s r

DS(ON)

• Small Converter Size

- Constant Frequency Operation

- 200kHz Free-Running Oscillator Programmable from

50kHz to over 1MHz

• QFN Package:

- Compliant to JEDEC PUB95 MO-220

QFN - Quad Flat No Leads - Package Outline

- Near Chip Scale Package footprint, which improves

PCB efficiency and has a thinner profile

Applications

• Power Supply for Pentium®, Pentium Pro, Pentium II,
PowerPC™, K6™, 6X86™ and Alpha™ Microprocessors

•

High-Power 5V to 3.xV DC-DC Regulators

•

Low-Voltage Distributed Power Supplies

DC
DC
DC

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

Copyright © Intersil Americas Inc. 2003. All Rights Reserved.

Pinouts

HIP6004B (SOIC, TSSOP)

TOP VIEW

HIP6004B

HIP6004B (QFN)

TOP VIEW

1

V

SEN

OCSET

SS
VID0
VID1
VID2
VID3
VID4

COMP

FB

2
3
4
5
6
7
8
9

10

Typical Application

PGOOD

SS

OVP

RT

20

OVP

19

V

18

CC

LGATE

17

PGND

16

BOOT

15

UGATE

14

PHASE

13
12

PGOOD
GND

11

+12V

MONITOR AND

PROTECTION

VCC

OCSET
EN
BOOT

SS

20 19 18 17 16

VID0

1

VID1

2

VID2

3

VID3

4

VID4

5

678910

COMP

VIN = +5V OR +12V

OCSET

FB

GND

21

VSEN

GND

RT

PGOOD

OVP

VCC

15

LGATE

14

PGND

13

BOOT

12

UGATE

11

PHASE

VID0
VID1
VID2
VID3
VID4

RT

FB

D/A

OSC

+

-

COMP

HIP6004B

+

-

VSEN

GND

UGATE
PHASE

LGATE
PGND

+V

OUT

2

Block Diagram

V

SEN

OCSET

VID0
VID1
VID2
VID3
VID4

FB

COMP

RT

REFERENCE

TTL D/A

CONVERTER

(DAC)

200µA

DACOUT

110%

90%

115%

HIP6004B

+

-

+

­OVER-

VOLTAGE

+

-

+

-

OVER-

CURRENT

+

-

ERROR

AMP

OSCILLATOR

RESET (POR)

4V

PWM

COMPARATOR

+

-

V

CC

POWER-ON

SOFT-

START

INHIBIT

PWM

PGOOD

10µA

OVP

SS

BOOT
UGATE

PHASE

GATE

CONTROL

LOGIC

LGATE
PGND
GND

3

4

HIP6004B

Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted (Continued)

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

POWER GOOD

Upper Threshold (V
Lower Threshold (V
Hysteresis (V

SEN

/DACOUT) V

SEN

/DACOUT) V

SEN

/DACOUT) Upper and Lower Threshold - 2 - %

PGOOD Voltage Low V

PGOODIPGOOD

Rising 106 - 111 %

SEN

Falling 89 - 94 %

SEN

= -5mA - 0.5 - V

Typical Performance Curves

80

70

1000

RT PULLUP

TO +12V

60

C

= C

UPPER

50

LOWER

= C

GATE

C

GATE

= 3300pF

100

RESISTANCE (kΩ)

10

10 100 1000

SWITCHING FREQUENCY (kHz)

RT PULLDOWN TO V

SS

FIGURE 1. RT RESISTANCE vs FREQUENCY FIGURE 2. BIAS SUPPLY CURRENT vs FREQUENCY

Functional Pin Descriptions

1

V

SEN

V

SEN

OCSET

(Pin 1)

SS
VID0
VID1
VID2
VID3
VID4

COMP

FB

2
3
4
5
6
7
8
9

10

This pin is connected to the converters output voltage. The
PGOOD and OVP comparator circuits use this signal to
report output voltage status and for overvoltage protection.

OCSET (Pin 2)

Connect a resistor (R
upper MOSFET. R
(I

), and the upper MOSFET on-resistance (r

OCS

OCSET

) from this pin to the drain of the

OCSET

, an internal 200µA current source

20
19
18
17
16
15
14
13
12
11

RT
OVP
VCC
LGATE
PGND
BOOT
UGATE
PHASE
PGOOD
GND

DS(ON)

) set

40

(mA)

CC

I

30

20

10

0

100 200 300 400 500 600 700 800 900 1000

SWITCHING FREQUENCY (kHz)

C

C

GATE

GATE

= 1000pF

= 10pF

the converter over-current (OC) trip point according to the
following equation:

I

PEAK

OCSET

-----------------------------------------------------

=

OCSET

r

DS ON()

I

x R

An over-current trip cycles the soft-start function.

SS (Pin 3)

Connect a capacitor from this pin to ground. This capacitor,
along with an internal 10µA current source, sets the soft­start interval of the converter.

VID0-4 (Pins 4-8)

VID0-4 are the input pins to the 5-bit DAC. The states of
these five pins program the internal voltage reference
(DACOUT). The level of DACOUT sets the converter output
voltage. It also sets the PGOOD and OVP thresholds. Table
1 specifies DACOUT for the all combinations of DAC inputs.

COMP (Pin 9) and FB (Pin 10)

COMP and FB are the available external pins of the error
amplifier. The FB pin is the inverting input of the error
amplifier and the COMP pin is the error amplifier output.
These pins are used to compensate the voltage-control
feedback loop of the converter.

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