Intersil Corporation HIP6004 Datasheet

HIP6004
Data Sheet March 2000
Buck and Synchronous-Rectifier (PWM) Controller and Output Voltage Monitor
The HIP6004 provides complete control and protection for a DC-DC converter optimized for high-performance microprocessor applications. It is designed to drive two N-Channel MOSFETs in a synchronous-rectified buck topology. The HIP6004 integrates all of the control, output adjustment, monitoring andprotectionfunctions into a single package.
The output voltage of the converter is easily adjusted and precisely regulated. The HIP6004 includes a 5-input digital-to-analog converter (DAC) that adjusts the output voltage from 2.1V
1.3V
to 2.1VDC in 0.05V steps. The precision reference
DC
to 3.5VDCin 0.1V increments and from
DC
and voltage-moderegulator hold the selected output voltage to within ±1% over temperature and line voltage variations.
The HIP6004 provides simple, single feedback loop, voltage-modecontrol with fast transient response. It includes a 200kHz free-running triangle-wave oscillator that is adjustable from below 50kHz to over 1MHz. The error amplifier features a 15MHz gain-bandwidth product and 6V/µs slew rate which enables high converter bandwidth for fast transient performance. The resulting PWM duty ratio ranges from 0% to 100%.
The HIP6004 monitors the output voltage with a window comparator that tracks the DAC output and issues a Power Good signal when the output is within ±10%. The HIP6004 protects against over-current conditions by inhibiting PWM operation. Built-in over-voltage protection triggers an external SCR to crowbar the input supply. The HIP6004 monitors the current by using the r
DS(ON)
of the upper MOSFET which eliminates the need for a current sensing resistor.
Ordering Information
TEMP.
PART NUMBER
HIP6004CB 0 to 70 20 Ld SOIC M20.3
This data sheet describes a pre-released product.
Alpha Micro™ is a trademark of Digital Computer Equipment Corporation.
RANGE (oC) PACKAGE
Pentium® is a registered trademark of Intel Corporation.
PowerPC™ is a registered trademark of IBM.
PKG.
NO.
File Number 4275.2
Features
• Drives Two N-Channel MOSFETs
• Operates from +5V or +12V Input
• Simple Single-Loop Control Design
- Voltage-Mode PWM Control
• Fast Transient Response
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Ratio
• Excellent Output Voltage Regulation
- ±1% Over Line Voltage and Temperature
• 5-Bit Digital-to-Analog Output Voltage Selection
- Wide Range . . . . . . . . . . . . . . . . . . . 1.3V
DC
to 3.5V
- 0.1V Binary Steps. . . . . . . . . . . . . . . 2.1VDC to 3.5V
- 0.05V Binary Step. . . . . . . . . . . . . . . 1.3VDC to 2.1V
• Power-Good Output Voltage Monitor
• Over-Voltage and Over-Current Fault Monitors
- Does Not Require Extra Current Sensing Element, Uses MOSFETs r
DS(ON)
• Small Converter Size
- Constant Frequency Operation
- 200kHz Free-Running Oscillator Programmable from 50kHz to over 1MHz
Applications
Power Supply forPentium®,PentiumPro, PowerPC™and Alpha™ Microprocessors
High-Power 5V to 3.xV DC-DC Regulators
Low-Voltage Distributed Power Supplies
Pinout
HIP6004
(SOIC)
TOP VIEW
VSEN
OCSET
SS VID0 VID1 VID2 VID3 VID4
COMP
FB
1 2 3 4 5 6 7 8 9
10
20 19 18 17 16 15 14 13 12 11
RT OVP VCC LGATE PGND BOOT UGATE PHASE PGOOD GND
DC DC DC
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Copyright © Intersil Corporation 2000
Typical Application
HIP6004
Block Diagram
VSEN
OCSET
VID0 VID1 VID2 VID3 VID4
FB
COMP
RT
PGOOD
SS
OVP
RT
VID0 VID1 VID2 VID3 VID4
FB
REFERENCE
D/A
CONVERTER
(DAC)
OSC
D/A
+12V
VCC
MONITOR AND
PROTECTION
HIP6004
-
+
+
-
COMP
110%
90%
115%
200µA
DACOUT
VSEN
+
-
ERROR
AMP
OCSET EN BOOT
UGATE PHASE
LGATE PGND
GND
+
-
+
-
OVER-
VOLTAGE
+
-
+
-
OVER-
CURRENT
COMPARATOR
OSCILLATOR
4V
PWM
+
-
VIN = +5V or +12V
VCC
POWER-ON
RESET (POR)
SOFT-
START
INHIBIT
PWM
GATE
CONTROL
LOGIC
+V
10µA
OUT
PGOOD
OVP
SS BOOT
UGATE PHASE
LGATE PGND GND
2
HIP6004
Absolute Maximum Ratings Thermal Information
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +15V
Boot Voltage, V
BOOT
- V
. . . . . . . . . . . . . . . . . . . . . . . . +15V
PHASE
Input, Output or I/O Voltage. . . . . . . . . . . GND -0.3V to VCC +0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Class 2
Operating Conditions
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . +12V ±10%
Ambient Temperature Range. . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
Junction Temperature Range. . . . . . . . . . . . . . . . . . . .0oC to 125oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief 379 for details.
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
VCC SUPPLY CURRENT
Nominal Supply I
CC
POWER-ON RESET
Rising VCC Threshold V Falling VCC Threshold V Rising V
Threshold - 1.26 - V
OCSET
OSCILLATOR
Free Running Frequency RT = OPEN 185 200 215 kHz Total Variation 6k < RT to GND < 200k -15 - +15 % Ramp Amplitude V
OSC
REFERENCE AND DAC
DACOUT Voltage Accuracy -1.0 - +1.0 %
ERROR AMPLIFIER
DC Gain -88- dB Gain-Bandwidth Product GBW - 15 - MHz Slew Rate SR COMP = 10pF - 6 - V/µs
GATE DRIVERS
Upper Gate Source I Upper Gate Sink R Lower Gate Source I Lower Gate Sink R
UGATE
UGATEILGATE
LGATE
LGATEILGATE
PROTECTION
Over-Voltage Trip (V OCSET Current Source I OVP Sourcing Current I Soft Start Current I
/DACOUT) - 115 120 %
SEN
OCSETVOCSET
OVP
SS
POWER GOOD
Upper Threshold (V Lower Threshold (V
/ DACOUT) VSEN Rising 106 - 111 %
SEN
/ DACOUT) VSEN Falling 89 - 94 %
SEN
Hysteresis (VSEN / DACOUT) Upper and Lower Threshold - 2 - % PGOOD Voltage Low V
PGOODIPGOOD
UGATE and LGATE Open - 5 - mA
OCSET OCSET
RT = Open - 1.9 - V
V
- V
BOOT
= 0.3A - 5.5 10
VCC = 12V, V
= 0.3A - 3.5 6.5
V
= 5.5V, V
SEN
Thermal Resistance (Typical, Note 1) θJA (oC/W)
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC
Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
(SOIC - Lead Tips Only)
= 4.5V - - 10.4 V = 4.5V 8.2 - - V
PHASE
= 4.5V
= 12V, V
= 6V 300 450 - mA
LGATE
DC
= 0V 60 - - mA
OVP
= 6V 350 500 - mA
UGATE
170 200 230 µA
-10- µA
= -5mA - 0.5 - V
P-P
3
Typical Performance Curves
1000
100
RESISTANCE (k)
10
RT PULLUP TO +12V
RT PULLDOWN TO V
10 100 1000
SWITCHING FREQUENCY (kHz)
FIGURE 1. RT RESISTANCE vs FREQUENCY FIGURE 2. BIAS SUPPLY CURRENT vs FREQUENCY
SS
HIP6004
80
C
= 3300pF
70
60
C
= C
UPPER
50
(mA)
40
CC
I
30
20
10
0
100 200 300 400 500 600 700 800 900 1000
= C
LOWER
SWITCHING FREQUENCY (kHz)
GATE
GATE
C
C
GATE
GATE
= 1000pF
= 10pF
Functional Pin Description
1
VSEN
OCSET
SS VID0 VID1 VID2 VID3 VID4
COMP
FB
2 3 4 5 6 7 8 9
10
VSEN (Pin 1)
This pin is connected to the converters output voltage. The PGOOD and OVP comparator circuits use this signal to report output voltage status and for overvoltage protection.
OCSET (Pin 2)
Connect a resistor (R upper MOSFET. R (I
), and the upper MOSFET on-resistance (r
OCS
OCSET
the converter over-current (OC) trip point according to the following equation:
I
I
PEAK
OCSROCSET
------------------------------------------- -=
r
DS ON()
An over-current trip cycles the soft-start function.
) from this pin to the drain of the
OCSET
, an internal 200µA current source
SS (Pin 3)
Connect a capacitor from this pin to ground. This capacitor, along with an internal 10µA current source, sets the soft­start interval of the converter.
20 19 18 17 16 15 14 13 12 11
RT OVP VCC LGATE PGND BOOT UGATE PHASE PGOOD GND
DS(ON)
) set
VID0-4 (Pins 4-8)
VID0-4 are the input pins to the 5-bit DAC. The states of these five pins program the internal voltage reference (DACOUT). The level of DACOUT sets the converter output voltage. It also sets the PGOOD and OVP thresholds. Table 1 specifies DACOUT for the 32 combinations of DAC inputs.
COMP (Pin 9) and FB (Pin 10)
COMP and FB are the available external pins of the error amplifier. The FB pin is the inverting input of the error amplifier and the COMP pin is the error amplifier output. These pins are used to compensate the voltage-control feedback loop of the converter.
GND (Pin 11)
Signal ground forthe IC.All voltage levelsare measured with respect to this pin.
PGOOD (Pin 12)
PGOOD is an open collector output used to indicate the status of the converter output voltage. This pin is pulled low when the converter output is not within ±10% of the DACOUT reference voltage.
PHASE (Pin 13)
Connect the PHASE pin to the upper MOSFET source. This pin is used to monitor the voltage drop across the MOSFET for over-current protection. This pin also provides the return path for the upper gate drive.
UGATE (Pin 14)
Connect UGATE to the upper MOSFET gate. This pin provides the gate drive for the upper MOSFET.
BOOT (Pin 15)
This pin provides bias voltage to the upper MOSFET driver. A bootstrap circuit may be used to create a BOOT voltage suitable to drive a standard N-Channel MOSFET.
4
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