intersil HIP4080A DATA SHEET

®

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HIP4080A

Data Sheet July 2004

80V/2.5A Peak, High Frequency Full Bridge
FET Driver

The HIP4080A is a high frequency, medium voltage Full
Bridge N-Channel FET driver IC, available in 20 lead plastic
SOIC and DIP packages. The HIP4080A includes an input
comparator, used to facilitate the “hysteresis” and PWM
modes of operation. Its HEN (high enable) lead can force
current to freewheel in the bottom two external power
MOSFETs, maintaining the upper power MOSFETs off.
Since it can switch at frequencies up to 1MHz, the HIP4080A
is well suited for driving Voice Coil Motors, switching power
amplifiers and power supplies.

HIP4080A can also drive medium voltage brush motors, and
two HIP4080As can be used to drive high performance
stepper motors, since the short minimum “on-time” can
provide fine micro-stepping capability.

Short propagation delays of approximately 55ns maximize
control loop crossover frequencies and dead-times which
can be adjusted to near zero to minimize distortion, resulting
in precise control of the driven load.

The similar HIP4081A IC allows independent control of all 4
FETs in a Full Bridge configuration.

The Application Note for the HIP4080A is AN9404.

Ordering Information

PART

NUMBER

HIP4080AIPZ
(Note 1)

HIP4080AIP -40 to +85 20 Ld PDIP E20.3

HIP4080AIB -40 to +85 20 Ld SOIC M20.3

HIP4080AIBZ
(Note 1)

NOTES:

1. Intersil Pb-Free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-Free products are MSL
classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J Std-020B.

2. Add “T” suffix for Tape and Reel packing option. HIP4080AIP not
available in Tape and Reel.

TEMPERATURE

RANGE (°C) PACKAGE

-40 to +85 20 Ld PDIP
(Pb-Free)

-40 to +85 20 Ld SOIC
(Pb-Free)

PKG.

DWG. #

E20.3

M20.3

FN3658.7

Features

• Drives N-Channel FET Full Bridge Including High Side
Chop Capability

• Bootstrap Supply Max Voltage to 95VDC

• Drives 1000pF Load at 1MHz in Free Air at +50°C with
Rise and Fall Times of Typically 10ns

• User-Programmable Dead Time

• Charge-Pump and Bootstrap Maintain Upper Bias
Supplies

• DIS (Disable) Pin Pulls Gates Low

• Input Logic Thresholds Compatible with 5V to 15V Logic
Levels

• Very Low Power Consumption

• Undervoltage Protection

• Pb-Free Available as an Option

Applications

• Medium/Large Voice Coil Motors

• Full Bridge Power Supplies

• Switching Power Amplifiers

• High Performance Motor Controls

• Noise Cancellation Systems

• Battery Powered Vehicles

• Peripherals

• U.P.S.

Pinout

HIP4080A

(PDIP, SOIC)

TOP VIEW

BHB

HEN

DIS

V

OUT

IN+

IN-

HDEL

LDEL

AHB

SS

1

2

3

4

5

6

7

8

9

10

20

BHO

BHS

19

BLO

18

BLS

17

V

16

DD

V

15

CC

ALS

14

ALO

13

AHS

12

AHO

11

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143

Copyright Harris Corporation 1995, Copyright Intersil Americas Inc. 2003, 2004. All Rights Reserved

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

Application Block Diagram

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HEN

DIS

HIP4080A

12V

BHO

BHS

BLO

HIP4080A

80V

LOAD

IN+

IN-

ALO

AHS

AHO

GND

Functional Block Diagram (1/2 HIP4080A)

V

DD

HEN

DIS

OUT

IN+

IN

UNDER-

VOLTAGE

16

2

3

5

6

+

_

-

7

CHARGE

PUMP

LEVEL SHIFT

AND LATCH

TURN-ON

DELAY

TURN-ON

DELAY

DRIVER

DRIVER

GND

10

11

12

15

13

14

AHB

AHO

AHS

V

CC

ALO

ALS

HIGH VOLTAGE BUS ≤ 80VDC

C

BS

D

BS

TO VDD (PIN 16)

+12VDC

BIAS

C

BF

SUPPLY

8

HDEL

9

LDEL

4

V

SS

2

HIP4080A

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Typical Application (Hysteresis Mode Switching)

80V

6V

IN

12V

DIS

GND

1

BHB

2

HEN

3

DIS

4

V

SS

OUT

5

IN+

6

IN-

7

HDEL

8

LDEL

9

AHB

10

HIP4080A/HIP4080

BHO

BHS

BLO

BLS

V

DD

V

CC

ALS

ALO

AHS

AHO

20

19

18

17

16

15

14

13

12

11

12V

LOAD

-

+

6V

GND

3

HIP4080A

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Absolute Maximum Ratings Thermal Information

Supply Voltage, VDD and VCC. . . . . . . . . . . . . . . . . . . . -0.3V to 16V

Logic I/O Voltages . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V

Voltage on AHS, BHS . . . -6.0V (Transient) to 80V (25°C to 125°C)

DD

+0.3V

Voltage on AHS, BHS . . . -6.0V (Transient) to 70V (-55°C to 125°C)

Voltage on ALS, BLS . . . . . . . -2.0V (Transient) to +2.0V (Transient)

Voltage on AHB, BHB . . . . . . V

AHS, BHS

Voltage on ALO, BLO. . . . . . . . . . . . .V

Voltage on AHO, BHO . . . . . . V

Input Current, HDEL and LDEL . . . . . . . . . . . . . . . . . . -5mA to 0mA

AHS, BHS

-0.3V to V

ALS, BLS

-0.3V to V

AHS, BHS

-0.3V to VCC +0.3V

AHB, BHB

+V

DD

+0.3V

Phase Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V/ns

All Voltages relative to V

, unless otherwise specified.

SS

Operating Conditions

Supply Voltage, VDD and VCC. . . . . . . . . . . . . . . . . . +9.5V to +15V

Voltage on ALS, BLS . . . . . . . . . . . . . . . . . . . . . . . . . -1.0V to +1.0V

Voltage on AHB, BHB . . . . . . . .V

Input Current, HDEL and LDEL . . . . . . . . . . . . . . . .-500µA to -50µA

AHS, BHS

+5V to V

AHS, BHS

Operating Ambient Temperature Range . . . . . . . . . .-40°C to +85°C

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

3. θ

JA

+15V

Thermal Resistance (Typical, Note 3) θ

JA

(°C/W)

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Maximum Power Dissipation at +85°C

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .470mW

PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .530mW

Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C

Operating Max. Junction Temperature. . . . . . . . . . . . . . . . . . +125°C

Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300°C

(For SOIC - Lead Tips Only)

Electrical Specifications V

= VCC = V

DD

T

= +25°C, Unless Otherwise Specified

A

PARAMETERS SYMBOL TEST CONDITIONS

SUPPLY CURRENTS AND CHARGE PUMPS

V

Quiescent Current I

DD

V

Operating Current I

DD

Quiescent Current I

V

CC

Operating Current I

V

CC

AHB, BHB Quiescent Current ­Qpump Output Current

I

AHB

AHB, BHB Operating Current I

AHS, BHS, AHB, BHB Leakage Current I

AHB-AHS, BHB-BHS Qpump
Output Voltage

INPUT COMPARATOR PINS: IN+, IN-, OUT

DD

DDO

CC

CCO

AHBO

I

BHBO

HLK

V

AHB

V

AHS

V

BHB

V

BHS

, I

= V

AHB

= 12V, VSS = V

BHB

ALS

= V

BLS

= V

AHS

= V

= 0V, R

BHS

T

= +25°C

J

HDEL

= R

LDEL

= - 40°C

T

J

TO +125°C

IN- = 2.5V, Other Inputs = 0V 8 11 14 7 14 mA

Outputs switching f = 500kHz, No Load 9 12 15 8 15 mA

IN- = 2.5V, Other Inputs = 0V,

= I

BLO

= 0

I

ALO

- 25 80 - 100 µA

f = 500kHz, No Load 1 1.25 2.0 0.8 3 mA

IN- = 2.5V, Other Inputs = 0V,

BHB

I

AHO=IBHO

V

DD

,

f = 500kHz, No Load 0.62 1.2 1.5 0.5 1.9 mA

V

BHS

V

AHB

-

I

AHB

= 0,

= V

= V

= V

= I

CC =VAHB

AHS
BHB

AHB

= V

= 10V

BHB

= 80V,
= 93V

= 0, No Load 11.5 12.6 14.0 10.5 14.5 V

-50 -25 -11 -60 -10 µA

- 0.02 1.0 - 10 µA

-

= 100K, and

UNITSMIN TYP MAX MIN MAX

Offset Voltage V

Input Bias Current I

Input Offset Current I

OS

OS

Over Common Mode Voltage Range -10 0 +10 -15 +15 mV

IB

Input Common Mode Voltage Range CMVR 1 - V

4

00.52 0 4 µA

-1 0 +1-2+2µA

1V

DD

-1.5

DD

-1.5

V

HIP4080A

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Electrical Specifications V

PARAMETERS SYMBOL TEST CONDITIONS

Voltage Gain AVOL 10 25 - 10 - V/mV

OUT High Level Output Voltage V

OUT Low Level Output Voltage V

Low Level Output Current I

High Level Output Current I

INPUT PINS: DIS

Low Level Input Voltage V

High Level Input Voltage V

Input Voltage Hysteresis -35- - -mV

Low Level Input Current I

High Level Input Current I

INPUT PINS: HEN

Low Level Input Voltage V

High Level Input Voltage V

Input Voltage Hysteresis -35- - -mV

Low Level Input Current I

High Level Input Current I

TURN-ON DELAY PINS: LDEL AND HDEL

LDEL, HDEL Voltage V

GATE DRIVER OUTPUT PINS: ALO, BLO, AHO, AND BHO

= VCC = V

DD

= +25°C, Unless Otherwise Specified (Continued)

T

A

HDEL,

OH

OL

OL

OH

IL

IH

IL

IH

IL

IH

IL

IH

= V

AHB

VI

= 12V, VSS = V

BHB

IN+ > IN-, IOH = -250µAV

IN+ < IN-, IOL = +250µA - -0.4-0.5V

V

= 6V 6.5 14 19 6 20 mA

OUT

V

= 6V -17 -10 -3 -20 -2.5 mA

OUT

Full Operating Conditions - - 1.0 - 0.8 V

Full Operating Conditions 2.5 - - 2.7 - V

VIN = 0V, Full Operating Conditions -130 -100 -75 -135 -65 µA

VIN = 5V, Full Operating Conditions -1 - +1 -10 +10 µA

Full Operating Conditions - - 1.0 - 0.8 V

Full Operating Conditions 2.5 - - 2.7 - V

VIN = 0V, Full Operating Conditions -260 -200 -150 -270 -130 µA

VIN = 5V, Full Operating Conditions -1 - +1 -10 +10 µA

= I

HDEL

= -100µA 4.9 5.1 5.3 4.8 5.4 V

LDEL

ALS

= V

BLS

= V

AHS

= V

DD

-0.4

= 0V, R

BHS

= +25°C

T

J

HDEL

--V

= R

LDEL

= - 40°C

T

J

TO +125°C

DD

- 0.5

= 100K, and

UNITSMIN TYP MAX MIN MAX

-V

Low Level Output Voltage V

High Level Output Voltage V

Peak Pullup Current I

Peak Pulldown Current I

Under Voltage, Rising Threshold UV+ 8.1 8.8 9.4 8.0 9.5 V

Under Voltage, Falling Threshold UV- 7.6 8.3 8.9 7.5 9.0 V

Under Voltage, Hysteresis HYS 0.25 0.4 0.65 0.2 0.7 V

OL

- VOHI

CC

O

O

I

= 100mA 0.7 0.85 1.0 0.5 1.1 V

OUT

= -100mA 0.8 0.95 1.1 0.5 1.2 V

OUT

+V

-V

OUT

OUT

= 0V 1.7 2.6 3.8 1.4 4.1 A

= 12V 1.7 2.4 3.3 1.3 3.6 A

5

HIP4080A

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Switching Specifications V

PARAMETERS SYMBOL TEST CONDITIONS

Lower Turn-off Propagation Delay (IN+/IN- to ALO/BLO) T

Upper Turn-off Propagation Delay (IN+/IN- to AHO/BHO) T

Lower Turn-on Propagation Delay (IN+/IN- to ALO/BLO) T

Upper Turn-on Propagation Delay (IN+/IN- to AHO/BHO) T

Rise Time T

Fall Time T

Turn-on Input Pulse Width T

Turn-off Input Pulse Width T

Disable Turn-off Propagation Delay
(DIS - Lower Outputs)

Disable Turn-off Propagation Delay
(DIS - Upper Outputs)

Disable to Lower Turn-on Propagation Delay
(DIS - ALO and BLO)

= VCC = V

DD

= 1000pF, and TA = +25°C, Unless Otherwise Specified

C

L

AHB

= V

BHB

= 12V, VSS = V

PWIN-ON

PWIN-OFF

T

T

T

LPHL

HPHL

LPLH

HPLH

R

F

DISLOW

DISHIGH

DLPLH

ALS

= V

BLS

= V

AHS

= V

= 0V, R

BHS

T

= +25°C

J

- 40 70 - 90 ns

-5080-110ns

- 40 70 - 90 ns

- 70 110 - 140 ns

- 10 25 - 35 ns

- 10 25 - 35 ns

50 - - 50 - ns

40 - - 40 - ns

- 45 75 - 95 ns

-5585-105ns

- 45 70 - 90 ns

HDEL

= R

LDEL

T

= - 40°C

J

TO +125°C

= 10K,

UNITSMIN TYP MAX MIN MAX

Refresh Pulse Width (ALO and BLO) T

Disable to Upper Enable (DIS - AHO and BHO) T

HEN-AHO, BHO Turn-off, Propagation Delay T

HEN-AHO, BHO Turn-on, Propagation Delay T

INPUT OUTPUT

IN+ > IN- HEN U/V DIS ALO AHO BLO BHO

X XX10000

0 0001000

1 1000110

0 1001001

1 0000010

X X1X0000

REF-PW

UEN

HEN-PHLRHDEL

HEN-PLHRHDEL

TRUTH TABLE

= R

= R

= 10K - 40 70 - 90 ns

LDEL

= 10K - 60 90 - 110 ns

LDEL

240 380 500 200 600 ns

- 480 630 - 750 ns

6