Intersil Corporation HIP1011A Datasheet

HIP1011A

Data Sheet March 2000 File Number 4631.3

PCI Hot Plug Controller

The HIP1011A is the second PCI Hot Plug Voltage bus control IC from Intersil. A drop-in alternative to the widely used HIP1011, the HIP1011A has the same form, ﬁt and function but additionally features an adjustablelatch-offtime of the MOSFET switches and fault reporting.

Like the HIP1011, the HIP1011A creates a small and simple yet complete power control solution with discrete power MOSFETs and a few passive components. Four independent supplies are controlled, +5V, +3.3, +12V, and

-12V. The +12V and -12V switches are integrated. For the +5V and +3.3V supplies, overcurrent (OC) protection is provided by sensing the voltage across external currentsense resistors. For the +12V and -12V supplies OC protection is provided internally. In addition, an on-chip reference is used to monitor the +5V, +3.3V and +12V outputs forundervoltage (UV) conditions. The PWRON input controls the state of the switches. During an OC condition on any output, or a UV condition on the +5V, +3.3V or +12V outputs, a LOW (0V) is asserted on the FLTN output and all MOSFETs are latched-off. The time to FLTN signal going LOW and MOSFET latch-off is determined by a single capacitor from the FLTN pin to ground. This added feature allows the system OS to complete housekeeping activities in preparation for an unplanned shut down of the affected card. The FLTNlatch is cleared when the PWRON input is toggled low again. During initial power-up of the main VCC supply (+12V), the PWRON input is inhibited from turning on the switches, and the latch is held in the Reset state until the VCC input is greater than 10V.

Features

• Adjustable Delay Time for Turn-Off and Fault Reporting

• Controls All PCI Supplies: +5V, +3.3V, +12V, -12V

• Internal MOSFET Switches for +12V and -12V Outputs

• µP Interface for On/Off Control and Fault Reporting

• Adjustable Overcurrent Protection for All Supplies

• Provides Fault Isolation

• Adjustable Turn-On Slew Rate

• Minimum Parts Count Solution

• No Charge Pump

Applications

• PCI Hot Plug

• CompactPCI

Ordering Information

TEMP.RANGE

PART NUMBER

HIP1011ACB 0 to 70 16 Ld SOIC M16.15 HIP1011ACB-T 0 to 70 Tape and Reel

(oC) PACKAGE

PKG.

NO.

Pinout

HIP1011A

(SOIC)

TOP VIEW

User programmability of the overcurrent threshold, fault reporting response time, latch-off response time and turn-on slew rate is provided. A resistor connected to the OCSET pin programs the OC threshold. A capacitor may be added to the FLTNpin to adjust both the delay time to reporting a fault and the latch-off of the supplies after an OC or UV event. Capacitors connected to the gate pins set the turn-on rate. In addition the HIP1011A has also been enhanced to tolerate spurious system noise.

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

FLTN

3V5VG

12VIN

3VS

1 2 3 4 5 6 7 8

M12VIN

3VISEN

OCSET

1-888-INTERSIL or 321-724-7143

M12VO

M12VG

12VG

GND

12VO

5VISEN

5VS

PWRON

Typical Application

3.3V INPUT

HIP1011A

3.3V,

7.6A OUT 0.5A OUT 0.1A OUT 5A OUT

5mΩ, 1%

12V,

5V,-12V,

5mΩ, 1%

5V INPUT

HUF761315K8

-12V INPUT

12V INPUT

POWER CONTROL INPUT

NOTE: All capacitors are ±10%.

Simpliﬁed Schematic

100µA

OCSET

PWRON

GND

5V ZENER

REFERENCE

12VIN

POWER-ON

RESET

5VREF

OCSET

SET (LOW = FAULT)

LOW WHEN V

HIP1011A

M12VIN FLTN 3V5VG V

12VIN 3VISEN 3VS

6.04kΩ

FAULT OUTPUT (ACTIVE LOW)

< 10V

OCSET

(OPTIONAL)

RESET

HIGH = FAULT

M12VO M12VG

12VG

GND

12VO

5VISEN

5VS

PWRON

5VREF

COMP

HIGH = SWITCHES ON

COMP

0.033µF

FAULT LATCH

OCSET

/13.3

0.033µF

LOW = FAULT COMP

INHIBIT

COMP

INHIBIT

COMP

/17

INHIBIT

/0.8

/3.3

4.6V

2.9V

10.8V

0.3Ω

0.7Ω

FLTN

5VS

3V5VG

5VISEN 3VS

3VISEN 12VIN

12VG

12VO M12VIN

M12VG

M12VIN

M12VO

HIP1011A

Pin Descriptions

PIN NO. DESIGNATOR FUNCTION DESCRIPTION

1 M12VIN -12V Input -12V Supply Input. Also provides power to the -12V overcurrent circuitry. 2 FLTN Fault Output 5V CMOS Fault Output; LOW = FAULT.A capacitor may be placed from this pin to ground to

provide delay time to fault notiﬁcation and power supply latch-off.

3 3V5VG 3.3V/5V Gate Output Drive the gates of the 3.3V and 5V MOSFETs. Connect a capacitor to ground to set the start-

up ramp. During turn on, this capacitor is charged with a 25µA current source. 4 VCC 12V VCC Input Connect to unswitched 12V supply. 5 12VIN 12V Input Switched 12V supply input. 6 3VISEN 3.3V Current Sense Connect to the load side of the current sense resistor in series with source of external 3.3V

MOSFET. 7 3VS 3.3V Source Connect to source of 3.3V MOSFET. This connection along with pin 6 (3VISEN) senses the

voltage drop across the sense resistor. 8 OCSET Overcurrent Set Connecta resistor from this pin to ground to set the overcurrent trip point of all four switches.

All four over current trips can be programmed by changing the value of this resistor. The

default (6.04kΩ, 1%) is compatible with the maximum allowable currents as outlined in the

PCI speciﬁcation. 9 PWRON Power On Control Controls all four switches. High to turn switches ON, Low to turn them OFF.

10 5VS 5V Source Connect to source of 5V MOSFET switch. This connection along with pin 11 (5VISEN)

senses the voltage drop across the sense resistor.

11 5VISEN 5V Current Sense Connect to the load side of the current sense resistor in series with source of external 5V

MOSFET.

12 12VO Switched 12V Output Switched 12V output. 13 GND Ground Connect to common of power supplies. 14 12VG Gate of Internal PMOS Connect a capacitor between 12VG and 12VO to set the start up ramp for the +12V supply.

This capacitor is charged with a 25µA current source during start-up. The UV circuitry is

enabled after the voltage on 12VG is less than 400mV.Therefore,if the capacitor on the pin

3 (3V5VG) is more than 25% larger than the capacitor on pin 14 (12VG) a false UV may be

detected during start up.

15 M12VG Gate of Internal NMOS Connect a capacitor between M12VG and M12VO to set the start up ramp for the M12V

supply. This capacitor is charged with 25µA during start up.

16 M12VO Switched -12V

Output

Switched 12V Output.

HIP1011A

Absolute Maximum Ratings Thermal Information

VCC, 12VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +14.0V

12VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to V

12VIN

+0.5V

12VO, 12VG, 3V5VG . . . . . . . . . . . . . . . . . . . . . -0.5V to VCC+0.5V

M12VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -15.0V to +0.5V

M12VO, M12VG. . . . . . . . . . . . . . . . . . . . . . V

M12VIN

-0.5V to +0.5V

3VISEN, 5VISEN . . . . . . . . . . . -0.5V to the Lesser of VCC or +7.0V

Voltage, Any Other Pin. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V

12VO Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3A

M12VO Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8A

ESD Classiﬁcation . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4KeV (HBM)

Operating Conditions

VCC Supply Voltage Range. . . . . . . . . . . . . . . . . .+10.8V to +13.2V

±12V, 5V and 3.3V Input Supply Tolerances . . . . . . . . . . . . . . . .±10%

12VO Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +0.5A

M12VO Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +0.1A

Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . . . .0oC to 70oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

NOTES:

1. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief 379 for details.

2. All voltages are relative to GND, unless otherwise specified.

Thermal Resistance (Typical, Note 1) θJA (oC/W)

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .125oC

Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC

(SOIC - Lead Tips Only)

Die Characteristics

Number of Transistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .290

Electrical Speciﬁcations Nominal 5.0V and 3.3V Input Supply Voltages,

VCC = 12VIN = 12V, M12VIN = -12V, TA = TJ= 0 to 70oC, Unless Otherwise Speciﬁed

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

5V/3.3V SUPPLY CONTROL

5V Overcurrent Threshold I 5V Overcurrent Threshold Voltage V 5V Overcurrent Threshold Voltage V 5V Undervoltage Trip Threshold V 5V Undervoltage Fault Response Time t 5V Turn-On Time

OC5V OC5V_1 OC5V_2

5VUV

ON5V

(PWRON High to 5VOUT = 4.75V) 5VS Input Bias Current IB 5VISEN Input Bias Current IB 3V Overcurrent Threshold I 3V Overcurrent Threshold Voltage V 3V Overcurrent Threshold Voltage V 3V Undervoltage Trip Threshold V 3V Undervoltage Fault Response Time t 3V Turn-On Time

5VS 5VISEN OC3V

OC3V_1 OC3V_2

3VUV

ON3V

(PWRON High to 3VOUT = 3.00V) 3VS Input Bias Current IB 3VISEN Input Bias Current IB

3VS 3VISEN

3V5VG Vout Low Vout_lo_35VG PWRON = Low, FLTN = Low - 0.1 0.4 V 3V5VG Vout High Vout_hi_35VG PWRON = High, FLTN = High 10.5 11.1 - V Gate Output Charge Current IC

3V5VG

See Typical Application Diagram - 7.1 - A V

= 0.6V 30 36 42 mV

OCSET

= 1.2V 66 72 79 mV

OCSET

4.42 4.65 4.75 V

- 150 350 ns

3V5VG

= 0.022µF, C

5VOUT

= 2000µF,

- 6.5 - ms

RL = 1Ω PWRON = High -40 -26 -20 µA PWRON = High -160 -140 -110 µA See Typical Application Diagram - 9.0 - A V

= 0.6V 42 49 56 mV

OCSET

= 1.2V 88 95 102 mV

OCSET

2.74 2.86 2.97 V

- 150 350 ns

3V5VG

= 0.022µF, C

3VOUT

= 2000µF,

- 6.5 - ms

RL = 0.43Ω PWRON = High -40 -26 -20 µA PWRON = High -160 -140 -110 µA

PWRON = High, V

= 2V 22.5 25.0 27.5 µA

3V5VG

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