The HIN232-HIN241 family of RS-232 transmitters/receivers
interface circuits meet all ElA RS-232E and V.28 specifications,
and are particularly suited for those applications where ±12V is
not available. They require a single +5V power supply (except
HIN239) and feature onboard charge pump voltage converters
which generate +10V and
The family of devices off er a wide variety of RS-232
transmitter/receiver combinations to accommodate various
applications (see Selection Table).
The drivers feature true TTL/CMOS input compatibility, slewrate-limited output, and 300Ω power-off source impedance.
The receivers can handle up to ±30V, and have a 3kΩ to 7kΩ
input impedance. The receivers also feature hysteresis to
greatly improve noise rejection.
C1+External capacitor (+ terminal) is connected to this lead.
C1-External capacitor (- terminal) is connected to this lead.
C2+External capacitor (+ terminal) is connected to this lead.
C2-External capacitor (- terminal) is connected to this lead.
T
IN
T
OUT
R
IN
R
OUT
EN
SDShutdown Input. With SD = 5V, the charge pump is disabled, the receiver outputs are in a high impedance state and the
NCNo Connect. No connections are made to these leads.
Power Supply Input 5V ±10%.
Transmitter Inputs. These leads accept TTL/CMOS levels. A n internal 400kΩ pull-up resistor to V
Transmitter Outputs. These are RS-232 levels (nominally ±10V).
Receiver Inputs. These inputs accept RS-232 input le vels . An internal 5kΩ pull-dow n resistor to GND is connected to each input.
Receiver Outputs. These are TTL/CMOS levels.
Enable input. This is an active low input which enables the receiver outputs. With EN = 5V, the receiver outputs are placed in
HIN232CB0 to 7016 Ld SOICM16.3
HIN232CB-T0 to 70Tape and Reel
HIN232CBZ
(See Note)
HIN232CBZ-T
(See Note)
HIN232CP0 to 7016 Ld PDIPE16.3
HIN232CPZ
(See Note)
HIN232IB-40 to 8516 Ld SOICM16.3
HIN232IB-T-40 to 85Tape and Reel
HIN232IBZ
(See Note)
HIN232IBZ-T
(See Note)
HIN232IP-40 to 8516 Ld PDIPE16.3
HIN232IPZ
(See Note)
HIN236CB0 to 7024 Ld SOICM24.3
HIN236CBZ
(See Note)
HIN237CB0 to 7024 Ld SOICM24.3
HIN237CB-T0 to 70Tape and Reel
HIN237CBZ
(See Note)
HIN237CBZ-T
(See Note)
HIN238CB0 to 7024 Ld SOICM24.3
HIN238CB-T0 to 70Tape and Reel
HIN238CBZ
(See Note)
HIN238CBZ-T
(See Note)
HIN238CP0 to 7024 Ld PDIPE24.3
HIN238IB-40 to 8524 Ld SOICM24.3
HIN238IBZ
(See Note)
HIN239CB0 to 7024 Ld SOICM24.3
HIN239CB-T0 to 70Tape and Reel
HIN239CBZ
(See Note)
HIN239CBZ-T
(See Note)
HIN239CP0 to 7024 Ld PDIPE24.3
HIN239CPZ
(See Note)
HIN240CN0 to 7044 Ld MQFPQ44.10X10
HIN241CA0 to 7028 Ld SSOPM28.209
TEMP.
RANGE (
o
C)PACKAGEPKG. DWG. #
0 to 7016 Ld SOIC
(Pb-free)
0 to 70Tape and Reel (Pb-free)
0 to 7016 Ld PDIP
(Pb-free)
-40 to 8516 Ld SOIC
(Pb-free)
-40 to 85Tape and Reel (Pb-free)
-40 to 8516 Ld PDIP
(Pb-free)
0 to 7024 Ld SOIC
(Pb-free)
0 to 7024 Ld SOIC
(Pb-free)
0 to 70Tape and Reel (Pb-free)
0 to 7024 Ld SOIC
(Pb-free)
0 to 70Tape and Reel (Pb-free)
-40 to 8524 Ld SOIC
(Pb-free)
0 to 7024 Ld SOIC
(Pb-free)
0 to 70Tape and Reel (Pb-free)
0 to 7024 Ld PDIP
(Pb-free)
M16.3
E16.3
M16.3
E16.3
M24.3
M24.3
M24.3
M24.3
M24.3
E24.3
Ordering Information (Continued)
PART
NUMBER
HIN241CAZ
(See Note)
HIN241CB0 to 7028 Ld SOICM28.3
HIN241CB-T0 to 70Tape and Reel
HIN241CBZ
(See Note)
HIN241CBZ-T
(See Note)
HIN241IB-40 to 8528 Ld SOICM28.3
HIN241IBZ
(See Note)
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J Std-020B.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
2. Only HIN239. For V+ > 11V, C1 must be ≤0.1µF.
is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
3. θ
JA
o
C to 70oC
o
C to 85oC
(oC/W)
JA
o
C to 150oC
o
o
C
C
Electrical SpecificationsTest Conditions: V
= +5V ±10%, TA = Operating Temperature Range
CC
PARAMETERTEST CONDITIONSMINTYPMAXUNITS
SUPPLY CURRENTS
Power Supply Current, I
CC
V+ Power Supply Current, I
No Load, TA = 25oC
Shutdown Supply Current, I
CC
(SD)TA = 25oC-110µA
CC
No Load,
T
= 25oC
A
No Load,
TA = 25oC
LOGIC AND TRANSMITTER INPUTS, RECEIVER OUTPUTS
Input Logic Low, V
Input Logic High, V
Transmitter Input Pullup Current, I
lL
lH
P
TTL/CMOS Receiver Output Voltage Low, V
TTL/CMOS Receiver Output Voltage High, V
TIN, EN, Shutdown--0.8V
T
IN
, Shutdown2.4--V
EN
TIN = 0V-15200µA
I
OL
OH
= 1.6mA-0.10.4V
OUT
I
= -1.0mA3.54.6-V
OUT
RECEIVER INPUTS
RS-232 Input Voltage Range V
Receiver Input Impedance R
Receiver Input Low Threshold, V
Receiver Input High Threshold, V
Receiver Input Hysteresis V
Baud Rate (1 Transmitter Switching)R
Output Enable Time, t
Output Disable Time, t
Propagation Delay, t
Instantaneous Slew Rate SRC
Transition Region Slew Rate, SR
TRANSMITTER OUTPUTS
Output Voltage Swing, T
Output Resistance, T
RS-232 Output Short Circuit Current, I
NOTE:
4. Guaranteed by design.
V
CC
GND
EN
DIS
PD
OUT
OUT
VOLTAGE DOUBLER
S1
S3
T
SC
+
C1
C1-
S2
+
C1
-
S4
= +5V ±10%, TA = Operating Temperature Range (Continued)
Transmitter Outputs, 3kΩ to Ground±5±9±10V
VCC = V+ = V- = 0V, V
T
shorted to GND-±10-mA
OUT
+
C3
V
CC
= ±2V300--Ω
OUT
VOLTAGE INVE RTER
V+ = 2V
GND
CC
S5
S7
C2
C2
+
S6
+
C2
-
-
S8
+
C4
-
GND
V- = -(V+)
RC
OSCILLATOR
FIGURE 1. CHARGE PUMP
Detailed Description
The HIN232 thru HIN241 family of RS-232
transmitters/receivers are powered by a single +5V pow er
supply (except HIN239), feature low power consumption, and
meet all ElA RS-232C and V.28 specifications. The circuit is
divided into three sections: The charge pump, transmitter, and
receiver.
Charge Pump
An equivalent circuit of the charge pump is illustrated in
Figure 1. The charge pump contains two sections: the v oltage
doubler and the voltag e in verter. Each section is drive n by a
two phase, internally generated clock to gener ate +10V and
-10V. The nominal clock frequency is 16kHz. During phase
one of the clock, capacitor C1 is charged to V
phase two, the voltage on C1 is added to V
signal across C3 equal to twice V
also charged to 2V
, and then during phase two, it is
CC
. During phase one, C2 is
CC
inverted with respect to ground to produce a signal across C4
equal to -2V
. The charge pump accepts input voltages up
CC
. During
CC
, producing a
CC
to 5.5V. The output impedance of the voltage doubler section
(V+) is approximately 200Ω, and the output impedance of the
voltage inv erter section (V-) is approximately 450Ω. A typical
application uses 1µF capacitors for C1-C4, ho we ver , the val ue
is not critical. Increasing the values of C1 and C2 will lo wer the
output impedance of the voltage doubler an d inverter,
increasing the values of the reservoir capacitors, C3 and C4,
lowers the ripple on the V+ and V- supplies.
During shutdown mode (HIN236, HIN240 and HIN241),
SHUTDOWN control line set to logic “1”, the charge pump is
turned off, V+ is pulled down to V
, V - is pulled up to GND,
CC
and the supply current is reduced to less than 10µA. The
transmitter outputs are disabled and the receiver outputs are
placed in the high impedance state.
The transmitters are TTL/CMOS compatible inverters which
translate the inputs to RS-232 outputs. The input logic threshold
is about 26% of V
input results in a voltage of between -5V and V- at the output,
and a logic 0 results in a voltage between +5V and (V+ -0.6V).
Each transmitter input has an internal 400kΩ pullup resistor so
any unused input can be left unconnected and its output
remains in its low state. The output voltage swing meets the
RS-232C specifications of ±5V minimum with the worst case
conditions of: all transmitters driving 3kΩ minimum load
impedance, V
temperature. The transmitters have an internally limited output
slew rate which is less than 30V/µs. The outputs are short
circuit protected and can be shorted to ground indefinitely. The
powered down output impedance is a minimum of 300Ω with ±2V applied to the outputs and V
V+
V
CC
T
XIN
GND < T
XIN
, or 1.3V for VCC = 5V. A logic 1 at the
CC
= 4.5V, and maximum allowable operating
CC
= 0V.
CC
< V
400kΩ
CC
300Ω
V- < V
T
OUT
TOUT
< V+
Receivers
The receiver inputs accept up to ±30V while presenting the
required 3kΩ to 7kΩ input impedance even if the power is off
(V
= 0V). The receivers have a typical input threshold of
CC
1.3V which is within the ±3V limits, known as the transition
region, of the RS-232 specifications. The receiver output is
0V to V
greater than 2.4V and high whenever the input is floating or
driven between +0.8V and -30V. The receivers feature 0.5V
hysteresis to improve noise rejection. The receiver Enable
line EN
disables the receiver outputs, placing them in the high
impedance mode. The receiver outputs are also placed in
the high impedance state when in shutdown mode.
. The output will be low whenever the input is
CC
, when set to logic “1”, (HIN236, 239, 240, and 241)
The HIN2XX may be used for all RS-232 data terminal and
communication links. It is particularly useful in applications
where ±12V power supplies are not available for
conventional RS-232 interface circuits. The applications
presented represent typical interface configurations.
A simple duplex RS-232 port with CTS/RTS handshaking is
illustrated in Figure 9. Fixed output signals such as DTR
(data terminal ready) and DSRS (data signaling rate select)
is generated by driving them through a 5kΩ resistor
connected to V+.
In applications requiring four RS-232 inputs and outputs
(Figure 10), note that each circuit requires two charge pump
capacitors (C1 and C2) but can share common reservoir
capacitors (C3 and C4). The benefit of sharing common
reservoir capacitors is the elimination of two capacitors and
the reduction of the charge pump source impedance which
effectively increases the output swing of the transmitters.
1
+
TTL/CMOS
INPUTS AND
OUTPUTS
C1
1µF
-
TD
RTS
RD
CTS
HIN232
3
T1
11
R2
T2
R1
10
12
9
TTL/CMOS
INPUTS AND
OUTPUTS
FIGURE 9. SIMPLE DUPLEX RS-232 PORT WITH CTS/RTS
4
+
C2
5
1µF
-
14
TD (2) TRANSMIT DATA
7
RTS (4) REQUEST TO SEND
13
RD (3) RECEIVE DATA
8
CTS (5) CLEAR TO SEND
15
+5V
1
+
C1
3
1µF
-
4
+
C2
5
1µF
-
11
TD
10
RTS
12
RD
R2
9
CTS
HANDSHAKING
16
HIN232
T1
R1
T2
-
+
DTR (20) DATA
2
6
-
+
14
TD (2) TRANSMIT DATA
7
RTS (4) REQUEST TO SEND
13
RD (3) RECEIVE DATA
8
CTS (5) CLEAR TO SEND
SIGNAL GROUND (7)15
TERMINAL READY
DSRS (24) DATA
SIGNALING RATE
SELECT
RS-232
INPUTS AND OUTPUTS
16
TTL/CMOS
INPUTS AND
OUTPUTS
2µF
C1
1µF
DTR
DSRS
DCD
R1
26
C4
+
-
V- V+
6
HIN232
1
+
3
-
T1
11
R2
T2
R1
10
12
9
C3
+
2µF
2
16
4
+
C2
5
1µF
-
14
DTR (20) DATA TERMINAL READY
7
DSRS (24) DATA SIGNALING RATE SELECT
13
DCD (8) DATA CARRIER DETECT
8
R1 (22) RING INDICATOR
SIGNAL GROUND (7)15
+5V
-
RS-232
INPUTS AND OUTPUTS
FIGURE 10. COMBINING TWO HIN232s FOR 4 PAIRS OF RS-232 INPUTS AND OUTPUTS
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm (0.024
inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm
(0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch)
per side.
5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of “B”
dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
1. Controlling dimension: MILLIMETER. Converted inch
dimensions are not necessarily exact.
2. All dimensions and tolerances per ANSI Y14.5M-1982.
3. Dimensions D and E to be determined at seating plane .
4. Dimensions D1 and E1 to be determined at datum plane
.
-H-
5. Dimensions D1 and E1 do not include mold protrusion.
Rev. 2 4/99
-C-
Allowable protrusion is 0.25mm (0.010 inch) per side.
0.13/0.17
o
L
12o-16
0.005/0.007
BASE METAL
WITH PLATING
0.13/0.23
0.005/0.009
6. Dimension b does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total.
7. “N” is the number of terminal positions.
All Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems .
Intersil Corporation’s quality certifications can be viewed at website www.intersil.com/quality/iso.asp
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice.
Accordingly, the reader is cautioned to verify that data sheets are current before pla cing orders . Inf ormation furnished b y Intersil is belie v ed to be accurate and re liabl e. However , no responsib ility is assumed by In tersil or its subsidia ries f or its use; nor f or any i nfringements of patents or other rights of third p arties which may resu lt from its use . No
license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
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