Intersil Corporation HI5805 Datasheet
HI5805
Data Sheet February 1999 File Number 3984.6
12-Bit, 5MSPS A/D Converter
The HI5805 is a monolithic, 12-bit, Analog-to-Digital
Converter fabricated in Intersil’sHBC10BiCMOS process.It
is designed for high speed, high resolution applications
where wide bandwidth and low power consumption are
essential.
The HI5805 is designed in a fully differential pipelined
architecture with a front end differential-in-differential-out
sample-and-hold (S/H). The HI5805 has e xcellent dynamic
performance while consuming 300mW power at 5MSPS.
The 100MHz full power input bandwidth is ideal for
communication systems and document scanner
applications. Dataoutputlatchesare provided which present
valid data to the output bus with a latency of 3 clock cycles.
The digital outputs have a separate supply pin which can be
powered from a 3.0V to 5.0V supply.
Ordering Information
PART
NUMBER
HI5805BIB 5MSPS -40 to 85 28 Ld SOIC (W) M28.3
HI5805EVAL1 25 Evaluation Board
SAMPLE
RATE
TEMP.
RANGE (oC) PACKAGE
PKG.
NO.
Features
• Sampling Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . .5MSPS
•Low Power
• Internal Sample and Hold
• Fully Differential Architecture
• Full Power Input Bandwidth . . . . . . . . . . . . . . . . . 100MHz
• Low Distortion
• Internal Voltage Reference
• TTL/CMOS Compatible Digital I/O
• Digital Outputs . . . . . . . . . . . . . . . . . . . . . . . . . 5V to 3.0V
Applications
• Digital Communication Systems
• Undersampling Digital IF
• Document Scanners
• Additional Reference Documents
- AN9214 Using Intersil High Speed A/D Converters
- AN9707 Using the HI5805EVAL1 Evaluation Board
Pinout
DV
D
DV
D
AV
A
V
A
AV
CLK
CC1
GND1
CC1
GND1
CC
GND
V
IN+
V
IN-
V
DC
ROUT
V
RIN
GND
CC
10
11
12
13
14
1
2
3
4
5
6
7
8
9
HI5805
(SOIC)
TOP VIEW
28
D0
D1
27
26
D2
25
D3
24
D4
23
D5
22
DV
CC2
21
D
GND2
20
D6
19
D7
18
D8
17
D9
16
D10
15
D11
116
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Copyright © Intersil Corporation 1999
Functional Block Diagram
HI5805
V
DC
V
IN
VIN+
-
S/H
+
∑
X8
+
∑
X8
BIAS
STAGE 1
4-BIT
FLASH
4-BIT
DAC
-
STAGE 3
4-BIT
FLASH
4-BIT
DAC
-
CLOCK
REF
AND
DIGITAL DELAY
DIGITAL ERROR CORRECTION
CLK
V
ROUT
V
RIN
DV
CC2
D11 (MSB)
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0 (LSB)
AV
Typical Application Schematic
V
V
A
A
D
D
D
V
IN
VIN-
CLOCK
+
VIN+ (8)
VDC(10)
V
CLK (1)
STAGE 4
4-BIT
FLASH
CCAGNDDVCC1DGND1
(LSB) (28) D0
(11)
ROUT
(12)
RIN
(7)
GND
(13)
GND
(3)
GND1
(5)
GND1
(21)
GND2
(MSB) (15) D11
- (9)
IN
HI5805
(27) D1
(26) D2
(25) D3
(24) D4
(23) D5
(20) D6
(19) D7
(18) D8
(17) D9
(16) D10
(4) DV
(2) DV
(22) DV
(6) AV
(14) AV
CC1
CC1
CC2
CC
CC
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
0.1µF
0.1µF
D
GND
+
10µF
+
10µF
D
GND2
A
GND
+5V
10µF AND 0.1µF CAPS ARE PLACED
AS CLOSE TO PART AS POSSIBLE
+5V
BNC
117
HI5805
Absolute Maximum Ratings Thermal Information
Supply Voltage, AVCC or DVCC to A
D
GND
to A
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3V
GND
Digital I/O Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .D
Analog I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A
Operating Conditions
Temperature Range, HI5805BIB . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
GND
or D
. . . . . . . . . +6.0V
GND
GND
GND
to DV
to AV
CC
CC
Thermal Resistance (Typical, Note 1) θJA (oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150oC
Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering, 10s). . . . . . . . . . . . .300oC
(SOIC - Lead Tips Only)
Electrical Specifications AV
CC
= DV
CC1
= DV
CC2
= DV
= +5.0V, fS = 5MSPS at 50% Duty Cycle, V
CC3
= 3.5V, CL = 10pF,
RIN
TA = -40oC to 85oC, Differential Analog Input, Typical Values are Test Results at 25oC,
Unless Otherwise Specified
o
HI5805BIB (-40
PARAMETER TEST CONDITION
C TO 85oC)
UNITSMIN TYP MAX
ACCURACY
Resolution 12 - - Bits
Integral Linearity Error, INL fIN = DC - ±1 ±2 LSB
Differential Linearity Error, DNL
= DC - ±0.5 ±1 LSB
f
IN
(Guaranteed No Missing Codes)
Offset Error, V
OS
Full Scale Error, FSE f
fIN = DC - 19 - LSB
= DC - 32 - LSB
IN
DYNAMIC CHARACTERISTICS
Minimum Conversion Rate No Missing Codes - 0.5 - MSPS
Maximum Conversion Rate No Missing Codes 5 - - MSPS
Effective Number of Bits, ENOB f
Signal to Noise and Distortion Ratio, SINAD f
RMS Signal
--------------------------------------------------------------
=
RMS Noise + Distortion
Signal to Noise Ratio, SNR f
RMS Signal
-------------------------------
=
RMS Noise
Total Harmonic Distortion, THD f
2nd Harmonic Distortion f
3rd Harmonic Distortion f
Spurious Free Dynamic Range, SFDR f
Intermodulation Distortion, IMD f
= 1MHz 10.0 11 - Bits
IN
= 1MHz - 68 - dB
IN
= 1MHz - 68 - dB
IN
= 1MHz - -80 - dBc
IN
= 1MHz - -86 dBc
IN
= 1MHz - -83 - dBc
IN
= 1MHz - 83 - dBc
IN
= 1MHz, f2 = 1.02MHz - -68 - dBc
1
Transient Response - 1 - Cycle
Over-Voltage Recovery 0.2V Overdrive - 2 - Cycle
ANALOG INPUT
Maximum Peak-to-P eak Diff erential Analog Input Range
+ - VIN-)
(V
IN
- ±2.0 - V
Maximum Peak-to-Peak Single-Ended Analog Input Range - 4.0 - V
Analog Input Resistance, R
Analog Input Capacitance, C
Analog Input Bias Current, I
IN
IN
+ or IB- (Note 3) -10 - +10 µA
B
Differential Analog Input Bias Current I
= (IB+ - IB-) - ±0.5 - µA
B DIFF
(Notes 2, 3) 1 - - MΩ
-10-pF
Full Power Input Bandwidth, FPBW - 100 - MHz
Analog Input Common Mode Voltage Range (V
+ + VIN-)/2 Differential Mode (Note 2) 1 2.3 4 V
IN
118
HI5805
Electrical Specifications AV
CC
= DV
CC1
= DV
CC2
= DV
= +5.0V, fS = 5MSPS at 50% Duty Cycle, V
CC3
= 3.5V, CL = 10pF,
RIN
TA = -40oC to 85oC, Differential Analog Input, Typical Values are Test Results at 25oC,
Unless Otherwise Specified (Continued)
o
HI5805BIB (-40
PARAMETER TEST CONDITION
C TO 85oC)
UNITSMIN TYP MAX
INTERNAL VOLTAGE REFERENCE
Reference Output Voltage, V
(Loaded) - 3.5 - V
ROUT
Reference Output Current --1mA
Reference Temperature Coefficient - 200 - ppm/oC
REFERENCE VOLTAGE INPUT
Reference Voltage Input, V
RIN
Total Reference Resistance, R
L
- 3.5 - V
- 7.8 - kΩ
Reference Current - 450 - µA
DC BIAS VOLTAGE
DC Bias Voltage Output, V
DC
- 2.3 - V
Max Output Current (Not To Exceed) - - 1 mA
DIGITAL INPUTS (CLK)
Input Logic High Voltage, V
Input Logic Low Voltage, V
Input Logic High Current, I
Input Logic Low Current, I
Input Capacitance, C
IN
IH
IL
V
IH
IL
= 5V - - 10.0 µA
CLK
V
= 0V - - 10.0 µA
CLK
2.0 - - V
- - 0.8 V
-7-pF
DIGITAL OUTPUTS (D0-D11)
Output Logic Sink Current, I
OL
Output Logic Source Current, I
Output Capacitance, C
OUT
OH
VO = 0.4V (Note 2) 1.6 - - mA
= 3.0V, VO = 0.4V - 1.6 - mA
DV
CC3
VO = 2.4V (Note 2) -0.2 - - mA
DV
= 3.0V, VO = 2.4V - -0.2 - mA
CC3
-5-pF
TIMING CHARACTERISTICS
Aperture Delay, t
Aperture Jitter, t
AP
AJ
Data Output Delay, t
Data Output Hold, t
Data Latency, t
LAT
OD
H
For a Valid Sample (Note 2) - - 3 Cycles
-5-ns
- 5 - ps (RMS)
-8-ns
-8-ns
Clock Pulse Width (Low) 5MSPS Clock 90 100 110 ns
Clock Pulse Width (High) 5MSPS Clock 90 100 110 ns
POWER SUPPLY CHARACTERISTICS
Total Supply Current, I
Analog Supply Current, AI
Digital Supply Current, DI
Output Supply Current, DI
CC
CC
CC1
CC2
Power Dissipation V
Offset Error PSRR, ∆V
OS
Gain Error PSRR, ∆FSE AV
VIN+ - VIN- = 2V - 60 70 mA
VIN+ - VIN- = 2V - 46 - mA
VIN+ - VIN- = 2V - 13 - mA
VIN+ - VIN- = 2V - 1 - mA
+ - VIN- = 2V - 300 350 mW
IN
AVCCor DVCC = 5V ±5% - 2 - LSB
or DVCC = 5V ±5% - 30 - LSB
CC
NOTES:
2. Parameter guaranteed by design or characterization and not production tested.
3. With the clock off (clock low, hold mode).
119
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