intersil HI5760 DATA SHEET

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HI5760

Data Sheet March 30, 2005 FN4320.8

10-Bit, 125/60MSPS, High Speed D/A Converter

The HI5760 is a 10-bit, 125MSPS, high speed, low power, D/A converter which is implemented in an advanced CMOS process. Operating from a single +3V to +5V supply, the converter provides 20mA of full scale output current and includes edge-triggered CMOS input data latches. Low glitch energy and excellent frequency domain performance are achieved using a segmented current source architecture. For an equivalent performance dual version, see the HI5728.

This device complements the HI5X60 family of high speed converters offered by Intersil, which includes 8, 10, 12, and 14-bit devices.

Ordering Information

PART

NUMBER

HI5760BIB -40 to 85 28 Ld SOIC M28.3 125MHz HI5760BIBZ

(See Note) HI5760IA -40 to 85 28 Ld TSSOP M28.173 125MHz HI5760IAZ

(See Note) HI5760/6IB -40 to 85 28 Ld SOIC M28.3 60MHz HI5760/6IBZ

(See Note) HI5760EVAL1 25 Evaluation Platform 125MHz * Add “-T” suffix for tape and reel.

NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

TEMP.

RANGE (

o

C) PACKAGE

-40 to 85 28 Ld SOIC

-40 to 85 28 Ld TSSOP

-40 to 85 28 Ld SOIC

(Pb-free)

PKG.

NO.

M28.3 125MHz

M28.173 125MHz

M28.3 60MHz

CLOCK SPEED

Features

• Throughput Rate . . . . . . . . . . . . . . . . . . . . . . . .125MSPS

• Low Power . . . . . . . . . . . . . . . 165mW at 5V, 27mW at 3V

• Power Down Mode. . . . . . . . . . 23mW at 5V, 10mW at 3V

• Integral Linearity Error . . . . . . . . . . . . . . . . . . . . . .

±1 LSB

• Adjustable Full Scale Output Current. . . . . 2mA to 20mA

• SFDR to Nyquist at 5MHz Output . . . . . . . . . . . . . .68dBc

• Internal 1.2V Temperature Compensated Bandgap Voltage Reference

• Single Power Supply from +5V to +3V

• CMOS Compatible Inputs

• Excellent Spurious Free Dynamic Range

• Pb-Free Available (RoHS Compliant)

Applications

• Cable Modems

• Set Top Boxes

• Wireless Communications

• Direct Digital Frequency Synthesis

• Signal Reconstruction

• Test Instrumentation

• High Resolution Imaging Systems

• Arbitrary Waveform Generators

Pinout

HI5760 (SOIC, TSSOP)

TOP VIEW

D8 D7 D6 D5 D4 D3 D2 D1

NC NC NC NC

1 2 3 4 5 6 7 8

9 10 11 12 13 14

28 27 26 25 24 23 22 21 20 19 18 17 16 15

CLK DV

DD

DCOM NC AV

DD

NC IOUTA IOUTB ACOM COMP1 FSADJ REFIO REFLO SLEEP

D9 (MSB)

D0 (LSB)

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

Typical Applications Circuit

HI5760

NC

50Ω

FERRITE

BEAD

+

10µF

10µH

Functional Block Diagram

D9 D8

D7 D6 D5 D4 D3 D2 D1

D0

0.1µF

(11-14, 25)

D9 (MSB) (1) D8 (2) D7 (3) D6 (4) D5 (5) D4 (6) D3 (7) D2 (8) D1 (9) D0 (LSB) (10)

CLK (28)

DCOM (26)

DVDD (27)

(15) SLEEP (16) REFLO

(17) REFIO

(18) FSADJ

(22) IOUTA

(21) IOUTB

(23) NC

(19) COMP1

(20) ACOM

(24) AV

DD

DCOM

D/A OUT

10µH

ACOM

R

SET

+5V OR +3V (V

+

10µF

2kΩ

DD

)

0.1µF

50Ω

0.1µF FERRITE

BEAD

0.1µF

(LSB) D0

D1

D2

D3

D4

D5

D6

D7

D8

(MSB) D9

CLK

LATCH

UPPER

5-BIT

DECODER

31

LATCH

INT/EXT

REFERENCE

SELECT

IOUTA IOUTB

36

SWITCH MATRIX

INT/EXT

VOLTAGE

REFERENCE

CASCODE CURRENT

SOURCE

36

SEGMENTS

GENERATION

5 LSBs

+

31 MSB

BIAS

COMP1

ACOM DVDDDCOM

AV

DD

FSADJ

REFLO

REFIO

SLEEP

2

HI5760

Absolute Maximum Ratings Thermal Information

Digital Supply Voltage DVDD to DCOM . . . . . . . . . . . . . . . . . +5.5V

Analog Supply Voltage AV

Grounds, ACOM TO DCOM . . . . . . . . . . . . . . . . . . -0.3V To + 0.3V

Digital Input Voltages (D9-D0, CLK, SLEEP). . . . . . DV

Internal Reference Output Current . . . . . . . . . . . . . . . . . . . . . . . ±50µA

Reference Input Voltage Range. . . . . . . . . . . . . . . . . . AV

Analog Output Current (I

to ACOM . . . . . . . . . . . . . . . . . +5.5V

DD

) . . . . . . . . . . . . . . . . . . . . . . . . . 24mA

OUT

DD

+ 0.3V

Operating Conditions

Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

is measured with the component mounted on an evaluation PC board in free air.

1. θ

JA

Thermal Resistance (Typical, Note 1) θ

(oC/W)

JA

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

TSSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . 135

Maximum Junction Temperature

HI5760 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150

Maximum Storage Temperature Range . . . . . . . . . -65

o

C to 150oC

Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . .300

(SOIC - Lead Tips Only)

o

C

Electrical Specifications AV

= DVDD = +5V, V

DD

= Internal 1.2V, IOUTFS = 20mA, TA = 25oC for All Typical Values

REF

HI5760

= -40oC TO 85oC

T

A

PARAMETER TEST CONDITIONS

UNITSMIN TYP MAX

SYSTEM PERFORMANCE

Resolution 10 - - Bits Integral Linearity Error, INL “Best Fit” Straight Line (Note 7) -1 ±0.5 +1 LSB Differential Linearity Error, DNL (Note 7) -0.5 ±0.25 +0.5 LSB Offset Error, I Offset Drift Coefficient (Note 7) - 0.1 - ppm

(Note 7) -0.025 +0.025 % FSR

OS

FSR/

o

C

Full Scale Gain Error, FSE With External Reference (Notes 2, 7) -10 ±2+10% FSR

With Internal Reference (Notes 2, 7) -10 ±1+10% FSR

Full Scale Gain Drift With External Reference (Note 7) - ±50 - ppm

With Internal Reference (Note 7) - ±100 - ppm

Full Scale Output Current, I

FS

2-20mA

FSR/

o

C

o

C

Output Voltage Compliance Range (Note 3) -0.3 - 1.25 V

DYNAMIC CHARACTERISTICS

Maximum Clock Rate, f Output Settling Time, (t

CLK

) 0.2% (±1 LSB, equivalent to 9 Bits) (Note 7) - 20 - ns

SETT

(Note 3) 125 - - MHz

0.1% (±1/2 LSB, equivalent to 10 Bits) (Note 7) - 35 - ns

Singlet Glitch Area (Peak Glitch) R

= 25Ω (Note 7) - 5 - pV•s

L

Output Rise Time Full Scale Step - 1.0 - ns Output Fall Time Full Scale Step - 1.5 - ns Output Capacitance -10- pF Output Noise IOUTFS = 20mA - 50 - pA/√Hz

IOUTFS = 2mA - 30 - pA/√Hz

3

HI5760

Electrical Specifications AV

= DVDD = +5V, V

DD

= Internal 1.2V, IOUTFS = 20mA, TA = 25oC for All Typical Values (Continued)

REF

HI5760

= -40oC TO 85oC

T

A

PARAMETER TEST CONDITIONS

UNITSMIN TYP MAX

AC CHARACTERISTICS - HI5760BIB, HI5760IA - 125MHz

Spurious Free Dynamic Range, SFDR Within a Window

Total Harmonic Distortion (THD) to Nyquist

Spurious Free Dynamic Range, SFDR to Nyquist

= 125MSPS, f

f

CLK

= 100MSPS, f

f

CLK

= 60MSPS, f

f

CLK

= 50MSPS, f

f

CLK

= 50MSPS, f

f

CLK

= 100MSPS, f

f

CLK

= 50MSPS, f

f

CLK

= 50MSPS, f

f

CLK

= 125MSPS, f

f

CLK

= 125MSPS, f

f

CLK

f

= 100MSPS, f

CLK

= 100MSPS, f

f

CLK

= 100MSPS, f

f

CLK

= 100MSPS, f

f

CLK

= 60MSPS, f

f

CLK

= 50MSPS, f

f

CLK

= 50MSPS, f

f

CLK

= 50MSPS, f

f

CLK

= 50MSPS, f

f

CLK

= 32.9MHz, 10MHz Span (Notes 4, 7) - 75 - dBc

OUT

= 5.04MHz, 4MHz Span (Notes 4, 7) - 76 - dBc

OUT

= 10.1MHz, 10MHz Span (Notes 4, 7) - 75 - dBc

OUT

= 5.02MHz, 2MHz Span (Notes 4, 7) - 76 - dBc

OUT

= 1.00MHz, 2MHz Span (Notes 4, 7) - 78 - dBc

OUT

= 2.00MHz (Notes 4, 7) - 71 - dBc

OUT

= 2.00MHz (Notes 4, 7) - 71 - dBc

OUT

= 1.00MHz (Notes 4, 7) - 76 - dBc

OUT

= 32.9MHz, 62.5MHz Span (Notes 4, 7) - 54 - dBc

OUT

= 10.1MHz, 62.5MHz Span (Notes 4, 7) - 64 - dBc

OUT

= 40.4MHz, 50MHz Span (Notes 4, 7) - 52 - dBc

OUT

= 20.2MHz, 50MHz Span (Notes 4, 7) - 60 - dBc

OUT

= 5.04MHz, 50MHz Span (Notes 4, 7) - 68 - dBc

OUT

= 2.51MHz, 50MHz Span (Notes 4, 7) - 74 - dBc

OUT

= 10.1MHz, 30MHz Span (Notes 4, 7) - 63 - dBc

OUT

= 20.2MHz, 25MHz Span (Notes 4, 7) - 55 - dBc

OUT

= 5.02MHz, 25MHz Span (Notes 4, 7) - 68 - dBc

OUT

= 2.51MHz, 25MHz Span (Notes 4, 7) - 73 - dBc

OUT

= 1.00MHz, 25MHz Span (Notes 4, 7) - 73 - dBc

OUT

AC CHARACTERISTICS - HI5760/6IB, HI5760/6IA - 60MHz

Spurious Free Dynamic Range, SFDR Within a Window

Total Harmonic Distortion (THD) to Nyquist

Spurious Free Dynamic Range, SFDR to Nyquist

= 60MSPS, f

f

CLK

= 50MSPS, f

f

CLK

= 50MSPS, f

f

CLK

= 50MSPS, f

f

CLK

= 50MSPS, f

f

CLK

= 60MSPS, f

f

CLK

= 60MSPS, f

f

CLK

= 50MSPS, f

f

CLK

= 50MSPS, f

f

CLK

= 50MSPS, f

f

CLK

= 50MSPS, f

f

CLK

= 25MSPS, f

f

CLK

= 10.1MHz, 10MHz Span (Notes 4, 7) - 75 - dBc

OUT

= 5.02MHz, 2MHz Span (Notes 4, 7) - 76 - dBc

OUT

= 1.00MHz, 2MHz Span (Notes 4, 7) - 78 - dBc

OUT

= 2.00MHz (Notes 4, 7) - 71 - dBc

OUT

= 1.00MHz (Notes 4, 7) - 76 - dBc

OUT

= 20.2MHz, 30MHz Span (Notes 4, 7) - 56 - dBc

OUT

= 10.1MHz, 30MHz Span (Notes 4, 7) - 63 - dBc

OUT

= 20.2MHz, 25MHz Span (Notes 4, 7) - 55 - dBc

OUT

= 5.02MHz, 25MHz Span (Notes 4, 7) - 68 - dBc

OUT

= 2.51MHz, 25MHz Span (Notes 4, 7) - 73 - dBc

OUT

= 1.00MHz, 25MHz Span (Notes 4, 7) - 73 - dBc

OUT

= 5.02MHz, 25MHz Span (Notes 4, 7) - 71 - dBc

OUT

VOLTAGE REFERENCE

Internal Reference Voltage, V

FSADJ

Pin 18 Voltage with Internal Reference 1.04 1.16 1.28 V Internal Reference Voltage Drift - ±60 - ppm/ Internal Reference Output Current

-0.1- µA

Sink/Source Capability Reference Input Impedance -1-MΩ Reference Input Multiplying Bandwidth (Note 7) - 1.4 - MHz

o

C

4

HI5760

Electrical Specifications AV

= DVDD = +5V, V

DD

= Internal 1.2V, IOUTFS = 20mA, TA = 25oC for All Typical Values (Continued)

REF

HI5760

= -40oC TO 85oC

T

A

PARAMETER TEST CONDITIONS

UNITSMIN TYP MAX

DIGITAL INPUTS D9-D0, CLK

Input Logic High Voltage with 5V Supply, V

IH

Input Logic High Voltage with 3V Supply, V

IH

Input Logic Low Voltage with 5V Supply, V

IL

Input Logic Low Voltage with 3V Supply, V

Input Logic Current, I Input Logic Current, I

IL

IH IL

Digital Input Capacitance, C

IN

(Note 3) 3.5 5 - V

(Note 3) 2.1 3 - V

(Note 3) - 0 1.3 V

(Note 3) - 0 0.9 V

-10 - +10 µA

-5-pF

TIMING CHARACTERISTICS

Data Setup Time, t Data Hold Time, t

SU

HLD

Propagation Delay Time, t CLK Pulse Width, t

PW1

, t

PD

PW2

See Figure 41 (Note 3) 3 - - ns

See Figure 41 - 1 - ns

See Figure 41 (Note 3) 4 - - ns

POWER SUPPLY CHARACTERISTICS

Power Supply (Note 8) 2.7 5.0 5.5 V

AV

DD

Power Supply (Note 8) 2.7 5.0 5.5 V

DV

DD

Analog Supply Current (I

) (5V or 3V, IOUTFS = 20mA) - 23 30 mA

AVDD

(5V or 3V, IOUTFS = 2mA) - 4 - mA Digital Supply Current (I

) (5V, IOUTFS = Don’t Care) (Note 5) - 3 5 mA

DVDD

(3V, IOUTFS = Don’t Care) (Note 5) - 1.5 - mA Supply Current (I

) Sleep Mode (5V or 3V, IOUTFS = Don’t Care) - 1.6 3 mA

AVDD

Power Dissipation (5V, IOUTFS = 20mA) (Note 6) - 165 - mW

(5V, IOUTFS = 2mA) (Note 6) - 70 - mW

(5V, IOUTFS = 20mA) (Note 9) - 150 - mW

(3.3V, IOUTFS = 20mA) (Note 9) - 75 - mW

(3V, IOUTFS = 20mA) (Note 6) - 85 - mW

(3V, IOUTFS = 20mA) (Note 9) - 67 - mW

(3V, IOUTFS = 2mA) (Note 6) - 27 - mW Power Supply Rejection Single Supply (Note 7) -0.2 - +0.2 % FSR/V

NOTES:

2. Gain Error measured as the error in the ratio between the full scale output current and the current through R ratio should be 31.969.

(typically 625µA). Ideally the

SET

3. Parameter guaranteed by design or characterization and not production tested.

4. Spectral measurements made with differential coupled transformer.

5. Measured with the clock at 50MSPS and the output frequency at 1MHz.

6. Measured with the clock at 100MSPS and the output frequency at 40MHz.

7. See ‘Definition of Specifications’.

8. It is recommended that the output current be reduced to 12mA or less to maintain optimum performance for operation below 3V. DV do not have to be equal.

and AVDD

DD

9. Measured with the clock at 60MSPS and the output frequency at 10MHz.

5

HI5760

Typical Performance Curves, 5V Power Supply

80

75

70

65

SFDR (dBc)

60

55

50

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2

-12dBFS

OUTPUT FREQUENCY (MHz)

FIGURE 1. SFDR vs f

80

0dBFS

75

70

65

SFDR (dBc)

-12dBFS

60

0dBFS

OUT

-6dBFS

, CLOCK = 5MSPS FIGURE 2. SFDR vs f

76

74

72

70

68

SFDR (dBc)

66

64

62

60

12345678910

75

70

65

-12dBFS

60

SFDR (dBc)

55

50

-12dBFS

OUTPUT FREQUENCY (MHz)

, CLOCK = 25MSPS

OUT

-6dBFS

0dBFS

-6dBFS

0dBFS

55

02468101214161820

OUTPUT FREQUENCY (MHz)

FIGURE 3. SFDR vs f

75

70

65

-12dBFS

60

SFDR (dBc)

55

50

45

0 5 10 15 20 25 30 35 40 45 50

OUTPUT FREQUENCY (MHz)

FIGURE 5. SFDR vs f

, CLOCK = 50MSPS FIGURE 4. SFDR vs f

OUT

6dBFS

0dBFS

, CLOCK = 125MSPS FIGURE 6. SFDR vs AMPLITUDE, f

OUT

45

0 5 10 15 20 25 30 35 40 45

OUTPUT FREQUENCY (MHz)

, CLOCK = 100MSPS

OUT

80

75

70

65

60

SFDR (dBc)

55

50

45

-25 -20 -15 -10 -5 0

125MSPS

AMPLITUDE (dBFS)

25MSPS

100MSPS

CLK/fOUT

50MSPS

= 10

6