intersil HI-574A, HI-674A DATA SHEET

®

HI-574A, HI-674A

Data Sheet August 7, 2008

Complete, 12-Bit A/D Converters with
Microprocessor Interface

The HI-X74(A) is a complete 12-bit, Analog-to-Digital
Converter, including a +10V reference clock, three-state
outputs and a digital interface for microprocessor control.
Successive approximation conversion is performed by two
monolithic dice housed in a 28 lead package. The bipolar
analog die features the Intersil Dielectric Isolation process,
which provides enhanced AC performance and freedom
from latch-up.

Custom design of each IC (bipolar analog and CMOS digital)
has yielded improved performance over existing versions of
this converter. The voltage comparator features high PSRR
plus a high speed current-mode latch, and provides precise
decisions down to 0.1 LSB of input overdrive. More than 2X
reduction in noise has been achieved by using current
instead of voltage for transmission of all signals between the
analog and digital ICs. Also, the clock oscillator is current
controlled for excellent stability over temperature.

The HI-X74(A) offers standard unipolar and bipolar input
ranges, laser trimmed for specified linearity, gain and offset
accuracy. The low noise buried zener reference circuit is
trimmed for minimum temperature coefficient.

Power requirements are +5V and ±12V to ±15V, with typical
dissipation of 385mW (HI-574A, HI-674A) at 12V.

FN3096.6

Features

• Complete 12-Bit A/D Converter with Reference and Clock

• Full 8-Bit, 12-Bit or 16-Bit Microprocessor Bus Interface

• Bus Access Time . . . . . . . . . . . . . . . . . . . . . . . . . . . 150ns

• No Missing Codes Over Temperature

• Minimal Setup Time for Control Signals

• Fast Conversion Times

- HI-574A (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25µs

- HI-674A (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15µs

• Low Noise, via Current-Mode Signal Transmission
Between Chips

• Byte Enable/Short Cycle (A

Input)

O

- Guaranteed Break-Before-Make Action, Eliminating Bus

Contention During Read Operation. Latched by Start
Convert Input (To Set the Conversion Length)

• Supply Voltage. . . . . . . . . . . . . . . . . . . . . . ±12V to ±15V

• Pb-Free Available (RoHS Compliant)

Applications

• Military and Industrial Data Acquisition Systems

• Electronic Test and Scientific Instrumentation

• Process Control Systems

Pinout

+5V SUPPLY, V

DATA MODE SEL, 12/8

BYTE ADDR/SHORT

READ/CONVERT, R/C

CHIP ENABLE, CE

+12V/+15V SUPPLY, V

+10V REF, REF OUT

REFERENCE INPUT

-12V/-15V SUPPLY, V

BIPOLAR OFFSET

LOGIC

CHIP SEL, CS

CYCLE, A

ANALOG

COMMON, AC

BIP OFF

10V INPUT

20V INPUT

HI-574A, HI-674A

(28 LD PDIP, SBDIP)

TOP VIEW

1

2

3

4

O

5

6

7

CC

8

9

10

11

EE

12

13

14

28

STATUS, STS

27

DB11

26

DB10

25

DB9

24

DB8

23

DB7

22

DB6

21

DB5

20

DB4

19

DB3

18

DB2

17

DB1

16

DB0

DIG COMMON,

15

DC

MSB

DIGITAL
DATA
OUTPUTS

LSB

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

Copyright Intersil Americas Inc. 2001, 2008. All Rights Reserved

All other trademarks mentioned are the property of their respective owners.

HI-574A, HI-674A

Ordering Information

TEMPERATURE RANGE

PART NUMBER PART MARKING INL

HI3-574AJN-5 HI3-574AJN-5 ±1.0 LSB 0 to +75 28 Ld PDIP E28.6
HI3-574AJN-5Z (Notes 1, 3) HI3-574AJN-5Z ±1.0 LSB 0 to +75 28 Ld PDIP (Pb-Free) E28.6
HI3-574AKN-5 HI3-574AKN-5 ±0.5 LSB 0 to +75 28 Ld PDIP E28.6
HI3-574AKN-5Z (Notes 1, 3) HI3-574AKN-5Z ±0.5 LSB 0 to +75 28 Ld PDIP (Pb-Free) E28.6
HI1-574AJD-5 (Note 2) HI1-574AJD -5 ±1.0 LSB 0 to +75 28 Ld SBDIP (Pb-Free) D28.6
HI1-574AKD-5 (Note 2) HI1-574AKD -5 ±0.5 LSB 0 to +75 28 Ld SBDIP (Pb-Free) D28.6
HI1-574ASD-2 (Note 2) HI1-574ASD -2 ±1.0 LSB -55 to +125 28 Ld SBDIP (Pb-Free) D28.6
HI1-574ATD-2 (Note 2) HI1- 574ATD-2 ±0.5 LSB -55 to +125 28 Ld SBDIP (Pb-Free) D28.6
HI3-674AJN-5 HI3-674AJN-5 ±1.0 LSB 0 to +75 28 Ld PDIP E28.6
HI3-674AJN-5Z (Notes 1, 3) HI3-674AJN-5Z ±1.0 LSB 0 to +75 28 Ld PDIP (Pb-Free) E28.6
HI3-674AKN-5 HI3-674AKN-5 ±0.5 LSB 0 to +75 28 Ld PDIP E28.6
HI3-674AKN-5Z (Notes 1, 3) HI3-674AKN-5Z ±0.5 LSB 0 to +75 28 Ld PDIP (Pb-Free) E28.6
HI1-674AKD-5 (Note 2) HI1-674AKD -5 ±0.5 LSB 0 to +75 28 Ld SBDIP (Pb-Free) D28.6
HI1-674ATD/883 (Note 2) HI1-674ATD /883 ±0.5 LSB -55 to +125 28 Ld SBDIP (Pb-Free) D28.6

NOTES:

1. Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.

2. These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with
both SnPb and Pb-free soldering operations.

3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-

020.

(°C) PACKAGE

PKG.

DWG. #

2

FN3096.6

August 7, 2008

Functional Block Diagram

HI-574A, HI-674A

BIT OUTPUTS

MSB LSB

12/8

CS

A

O

R/C

CE

IN

V

REF

V

OUT

REF

CONTROL

LOGIC

OSCILLATOR

DIGITAL CHIP

ANALOG CHIP

+10V

REF

THREE-STATE BUFFERS AND CONTROL

POWER-UP RESET

CLK

12 BITS

10k

+

-

NIBBLE B (NOTE) NIBBLE C (NOTE)NIBBLE A (NOTE)

V

LOGIC

12 BITS

SAR

STROBE

COMP

DAC

5k

10k

5k

5k

+

-

2.5k

DIGITAL
COMMON

STS

V

CC

V

EE

ANALOG

COMMON

NOTE: “Nibble” is a 4-bit digital word.

BIP

OFF

20V

INPUT

10V

INPUT

3

FN3096.6

August 7, 2008

HI-574A, HI-674A

Absolute Maximum Ratings Thermal Information

Supply Voltage

V

to Digital Common . . . . . . . . . . . . . . . . . . . . . . 0V to +16.5V

CC

V

to Digital Common . . . . . . . . . . . . . . . . . . . . . . .0V to -16.5V

EE

V

to Digital Common . . . . . . . . . . . . . . . . . . . . . .0V to +7V

LOGIC

Analog Common to Digital Common . . . . . . . . . . . . . . . . . . . .±1V

Control Inputs

(CE, CS

, AO, 12/8, R/C) to Digital Common . . -0.5V to V

Analog Inputs

LOGIC

+0.5V

(REFIN, BIPOFF, 10VIN) to Analog Common . . . . . . . . . . ±16.5V

20VIN to Analog Common . . . . . . . . . . . . . . . . . . . . . . . . . . ±24V

REFOUT . . . . .Indefinite Short T o Common, Momentary Short T o V

CC

Operating Conditions

Temperature Range

HI3-574Axx-5, HI1-674Axx-5 . . . . . . . . . . . . . . . . . . 0°C to +75°C

HI1-574AxD-2, HI1-674AxD-2 . . . . . . . . . . . . . . .-55°C to +125°C

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.

NOTE:

is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

4. θ

JA

Thermal Resistance (Typical, Note 4) θ

SBDIP Package . . . . . . . . . . . . . . . . . . 55 18

(°C/W) θJC (°C/W)

JA

PDIP Package*. . . . . . . . . . . . . . . . . . . 60 N/A

Maximum Junction Temperature

PDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C

SBDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175°C

Maximum Storage Temperature Range

PDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C

SBDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C

Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below

http://www.intersil.com/pbfree/Pb-FreeReflow.asp
*Pb-free PDIPs can be used for through hole wave solder
processing only. They are not intended for use in Reflow solder
processing applications.

Die Characteristics

Transistor Count

HI-574A, HI-674A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1117

DC and Transfer Accuracy Specifications Typical at +25°C with V

= +15V or +12V, V

CC

= +5V, VEE = -15V or -12V;

LOGIC

Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise
specified. Temperature limits established by characterization and are not
production tested.

TEMPERATURE RANGE

-5 (0°C to +75°C)

PARAMETER

UNITSJ SUFFIX K SUFFIX

DYNAMIC CHARACTERISTICS

Resolution (Max) 12 12 Bits
Linearity Error

1

+25°C (Max) ±1 ±
0°C to +75°C (Max) ±1 ±

/

2

1

/

2

Max Resolution For Which No Missing Codes Is Guaranteed

+25°C 12 12 Bits
T

MIN

to T

MAX

11 12 Bits

Unipolar Offset (Max)

Adjustable to Zero ±2 ±1.5 LSB

Bipolar Offset (Max)

V

= 0V (Adjustable to Zero) ±4 ±4 LSB

IN

= -10V ±0.15 ±0.1 % of FS

V

IN

Full Scale Calibration Error

+25°C (Max), With Fixed 50Ω Resistor From REF OUT To REF IN

±0.25 ±0.25 % of FS

(Adjustable to Zero)
T
T

MIN
MIN

to T
to T

(No Adjustment At +25°C) ±0.475 ±0.375 % of FS

MAX

(With Adjustment To Zero +25°C) ±0.22 ±0.12 % of FS

MAX

LSB
LSB

4

FN3096.6

August 7, 2008

HI-574A, HI-674A

DC and Transfer Accuracy Specifications Typical at +25°C with V

= +15V or +12V, V

CC

= +5V, VEE = -15V or -12V;

LOGIC

Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise
specified. Temperature limits established by characterization and are not
production tested. (Continued)

TEMPERATURE RANGE

-5 (0°C to +75°C)

PARAMETER

Temperature Coefficients
Guaranteed Max Change, T

MIN

to T

(Using Internal Reference)

MAX

Unipolar Offset ±2 ±1 LSB
Bipolar Offset ±2 ±1 LSB
Full Scale Calibration ±9 ±2 LSB

Power Supply Rejection Max Change In Full Scale Calibration

+13.5V < V
+4.5V < V

-16.5V < V

< +16.5V or +11.4V < VCC < +12.6V ±2 ±1 LSB

CC

< +5.5V ±1/

LOGIC

< -13.5V or -12.6V < VEE < -11.4V ±2 ±1 LSB

EE

2

±1/

2

ANALOG INPUTS

Input Ranges

Bipolar -5 to +5 (Note 6) V

-10 to +10 (Note 7) V

Unipolar 0 to +10 (Note 6) V

0 to +20 (Note 7) V

Input Impedance

10V Span 5k, ±25% Ω
20V Span 10k, ±25% Ω

POWER SUPPLIES

Operating Voltage Range

V

LOGIC

V

CC

V

EE

+4.5 to +5.5 V

+11.4 to +16.5 V

-11.4 to -16.5 V

Operating Current

I

LOGIC

I

+15V Supply 11 Typ, 15 Max mA

CC

-15V Supply 21 Typ, 28 Max mA

I

EE

7 Typ, 15 Max mA

Power Dissipation

±15V, +5V 515 Typ, 720 Max mW
±12V, +5V 385 Typ mW

Internal Reference Voltage

T

to T

MIN

MAX

Output Current, Available For External Loads (External Load Should Not

+10.00 ±0.05 Max V

2.0 Max mA

Change During Conversion).

UNITSJ SUFFIX K SUFFIX

LSB

5

FN3096.6

August 7, 2008

HI-574A, HI-674A

8

DC and Transfer Accuracy Specifications Typical at +25°C with V

Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise
specified. Temperature limits established by characterization and are not
production tested. (Continued)

PARAMETER

DYNAMIC CHARACTERISTICS

Resolution (Max) 12 12 Bits
Linearity Error

+25°C ±1 ±

-55°C to +125°C (Max) ±1 ±1 LSB

Max Resolution For Which No Missing Codes Is Guaranteed

+25°C 12 12 Bits
T

to T

MIN

MAX

Unipolar Offset (Max)

Adjustable to Zero ±2 ±1.5 LSB

Bipolar Offset (Max)

V

= 0V (Adjustable to Zero) ±4 ±4 LSB

IN

= -10V ±0.15 ±0.1 % of FS

V

IN

Full Scale Calibration Error

+25°C (Max), With Fixed 50Ω Resistor From REF OUT To REF IN
(Adjustable To Zero)

to T

T

MIN

to T

T

MIN

Temperature Coefficients
Guaranteed Max Change, T

Unipolar Offset ±2 ±1 LSB
Bipolar Offset ±2 ±2 LSB
Full Scale Calibration ±20 ±10 LSB

Power Supply Rejection Max Change In Full Scale Calibration

+13.5V < V
+4.5V < V

-16.5V < V

ANALOG INPUTS

Input Ranges

Bipolar -5 to +5 (Note 6) V

Unipolar 0 to +10 (Note 6) V

Input Impedance

10V Span 5k, ±25% Ω
20V Span 10k, ±25% Ω

POWER SUPPLIES

Operating Voltage Range

V

LOGIC

V

CC

V

EE

(No Adjustment At +25°C) ±0.75 ±0.50 % of FS

MAX

(With Adjustment To Zero At +25°C) ±0.50 ±0.25 % of FS

MAX

to T

MIN

< +16.5V or +11.4V < VCC < +12.6V ±2 ±1 LSB

CC

< +5.5V ±1/

LOGIC

< -13.5V or -12.6V < VEE < -11.4V ±2 ±1 LSB

EE

(Using Internal Reference)

MAX

= +15V or +12V, V

CC

= +5V, VEE = -15V or -12V;

LOGIC

TEMPERATURE RANGE

-2 (-55°C to +125°C)

1

/

2

11 12 Bits

±0.25 ±0.25 % of FS

2

±1/

2

-10 to +10 (Note 7) V

0 to +20 (Note 7) V

+4.5 to +5.5 V

+11.4 to +16.5 V

-11.4 to -16.5 V

UNITSS SUFFIX T SUFFIX

LSB

LSB

6

FN3096.6

August 7, 2008