Intersil Corporation HI5660 Datasheet
HI5660
Data Sheet November 1999
8-Bit, 165/125/60MSPS, High Speed D/A
Converter
The HI5660 is an 8-bit, 125MSPS, high speed, low power,
D/A converter which is implemented in an advanced CMOS
process. Operating from a single +3V to +5V supply, the
converter provides 20mA of full scale output current and
includes edge-triggered CMOS input data latches. Lowglitch
energy and excellent frequency domain performance are
achievedusingasegmentedcurrentsourcearchitecture.For
an equivalent performance dual version, see the HI5628.
This device complements the CommLink™ HI5X60 family of
high speed converters offered by Intersil, which includes 8,
10, 12, and 14-bit devices.
Ordering Information
TEMP.
PART
NUMBER
HI5660/16IB† -40 to 85 28 Ld SOIC M28.3 165MHz
HI5660/16IA
HI5660IB -40 to 85 28 Ld SOIC M28.3 125MHz
HI5660IA
HI5660/6IB† -40 to 85 28 Ld SOIC M28.3 60MHz
HI5660/6IA -40 to 85 28 Ld TSSOP M28.173 60MHz
HI5660EVAL1
† -40 to 85 28 Ld TSSOP M28.173 125MHz
† Contact factory for availability.
RANGE
(oC) PACKAGE
PKG.
NO.
CLOCK
SPEED
† -40 to 85 28 Ld TSSOP M28.173 165MHz
† 25 Evaluation Platform 125MHz
File Number 4521.4
Features
• Throughput Rate . . . . . . . . . . . . . . . . . . . . . . . .125MSPS
• Low Power . . . . . . . . . . . . . . . 165mW at 5V, 27mW at 3V
• Power Down Mode . . . . . . . . . . 23mW at 5V, 10mW at 3V
• Integral Linearity Error . . . . . . . . . . . . . . . . . . .
±0.25 LSB
• Adjustable Full Scale Output Current. . . . . 2mA to 20mA
• SFDR to Nyquist at 10MHz Output . . . . . . . . . . . . .60dBc
• Internal 1.2V Bandgap Voltage Reference
• Single Power Supply from +5V to +3V
• CMOS Compatible Inputs
• Excellent Spurious Free Dynamic Range
Applications
• Medical Instrumentation
• Wireless Communications
• Direct Digital Frequency Synthesis
• Signal Reconstruction
• Test Instrumentation
• High Resolution Imaging Systems
• Arbitrary Waveform Generators
Pinout
HI5660 (SOIC, TSSOP)
TOP VIEW
D7 (MSB)
D0 (LSB)
D6
D5
D4
D3
D2
D1
DCOM
DCOM
DCOM
DCOM
DCOM
DCOM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
CLK
DV
DD
DCOM
NC
AV
DD
NC
IOUTA
IOUTB
ACOM
COMP1
FSADJ
REFIO
REFLO
SLEEP
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
CommLink™ is a trademark of Intersil Corporation.
| Copyright © Intersil Corporation 1999
Typical Applications Circuit
HI5660
HI5660
10µF
50Ω
FERRITE
BEAD
+
DCOM
10µH
D7
D6
D5
D4
D3
D2
D1
D0
0.1µF
(9-14, 25)
D7 (MSB) (1)
D6 (2)
D5 (3)
D4 (4)
D3 (5)
D2 (6)
D1 (7)
D0 (LSB) (8)
CLK (28)
DCOM (26)
DVDD (27)
(15) SLEEP
(16) REFLO
(17) REFIO
(18) FSADJ
(22) IOUTA
(21) IOUTB
(23) NC
(19) COMP1
(20) ACOM
(24) AV
DD
0.1µF
50Ω
50Ω
0.1µF
0.1µF
D/A OUT
D/A OUT
FERRITE
BEAD
10µH
DCOM
ACOM
R
SET
+
1.91kΩ
+5V OR +3V (V
10µF
DD
)
Functional Block Diagram
(LSB) D0
D1
D2
D3
D4
D5
D6
(MSB) D7
CLK
LATCH
UPPER
5-BIT
DECODER
IOUTA IOUTB
CASCODE
CURRENT
SOURCE
34
SWITCH
MATRIX
LATCH
31
INT/EXT
REFERENCE
SELECT
INT/EXT
VOLTAGE
REFERENCE
34
SEGMENTS
GENERATION
3 LSBs
+
31 MSB
BIAS
COMP1
ACOM DVDDDCOM
AV
DD
FSADJ
REFLO
REFIO
SLEEP
2
HI5660
Absolute Maximum Ratings Thermal Information
Digital Supply Voltage DVDD to DCOM . . . . . . . . . . . . . . . . . . +5.5V
Analog Supply Voltage AVDD to ACOM. . . . . . . . . . . . . . . . . .+5.5V
Grounds, ACOM TO DCOM. . -0.3V To +0.3V Digital Input Voltages
(D9-D0, CLK, SLEEP) . . . . . . . . . . . . . . . . . . . . . . . . . DVDD+ 0.3V
Internal Reference Output Current. . . . . . . . . . . . . . . . . . . . . ±50µA
Reference Input Voltage Range. . . . . . . . . . . . . . . . . . AVDD+ 0.3V
Analog Output Current (I
) . . . . . . . . . . . . . . . . . . . . . . . . . 24mA
OUT
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Thermal Resistance (Typical, Note 1) θJA(oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
TSSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150oC
Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
(SOIC - Lead Tips Only)
Electrical Specifications AV
PARAMETER TEST CONDITIONS
= DVDD = +5V, V
DD
= Internal 1.2V, IOUTFS = 20mA, TA = 25oC for All Typical Values
REF
= -40oC TO 85oC
T
A
UNITSMIN TYP MAX
SYSTEM PERFORMANCE
Resolution 8 - - Bits
Integral Linearity Error, INL “Best Fit” Straight Line (Note 7) -0.5 ±0.25 +0.5 LSB
Differential Linearity Error, DNL (Note 7) -0.5 ±0.25 +0.5 LSB
Offset Error, I
OS
(Note 7) -0.025 +0.025 % FSR
Offset Drift Coefficient (Note 7) - 0.1 - ppm
FSR/
Full Scale Gain Error, FSE With External Reference (Notes 2, 7) -10 ±2 +10 % FSR
With Internal Reference (Notes 2, 7) -10 ±1 +10 % FSR
Full Scale Gain Drift With External Reference (Note 7) - ±50 - ppm
FSR/
With Internal Reference (Note 7) - ±100 - ppm
FSR/
Full Scale Output Current, I
FS
2 - 20 mA
Output Voltage Compliance Range (Note 3) -0.3 - 1.25 V
DYNAMIC CHARACTERISTICS
Maximum Clock Rate, f
Output Settling Time, (t
CLK
) 0.8% (±1 LSB, equivalent to 7 Bits) (Note 7) - 5 - ns
SETT
(Notes 3, 9) 125 - - MHz
0.4% (±1/2 LSB, equivalent to 8 Bits) (Note 7) - 15 - ns
Singlet Glitch Area (Peak Glitch) R
= 25Ω (Note 7) - 5 - pV•s
L
Output Rise Time Full Scale Step - 1.5 - ns
Output Fall Time Full Scale Step - 1.5 - ns
Output Capacitance 10 pF
Output Noise IOUTFS = 20mA - 50 - pA/√
IOUTFS = 2mA - 30 - pA/√
AC CHARACTERISTICS HI5660/16IB, HI5660/16IA - 165MHz
Spurious Free Dynamic Range,
SFDR Within a Window
= 165MSPS, f
f
CLK
= 165MSPS, f
f
CLK
= 125MSPS, f
f
CLK
= 100MSPS, f
f
CLK
= 66.7MHz, 50MHz Span (Notes 4, 7, 9) - 60 - dBc
OUT
= 20.2MHz, 30MHz Span (Notes 4, 7, 9) - 69 - dBc
OUT
= 32.9MHz, 10MHz Span (Notes 4, 7) - 70 - dBc
OUT
= 5.04MHz, 4MHz Span (Notes 4, 7) - 73 - dBc
OUT
o
o
o
Hz
Hz
C
C
C
3
HI5660
Electrical Specifications AV
PARAMETER TEST CONDITIONS
Total Harmonic Distortion (THD) to
Nyquist
Spurious Free Dynamic Range,
SFDR to Nyquist
= DVDD = +5V, V
DD
f
= 165MSPS, f
CLK
= 100MSPS, f
f
CLK
= 165MSPS, f
f
CLK
= 165MSPS, f
f
CLK
= 125MSPS, f
f
CLK
= 125MSPS, f
f
CLK
= 100MSPS, f
f
CLK
= 100MSPS, f
f
CLK
= 100MSPS, f
f
CLK
= Internal 1.2V, IOUTFS = 20mA, TA = 25oC for All Typical Values (Continued)
REF
T
= -40oC TO 85oC
A
= 8.2MHz (Notes 4, 7) - 64 - dBc
OUT
= 2.00MHz (Notes 4, 7) - 67 - dBc
OUT
= 66.7MHz, 82.5MHz Span (Notes 4, 7, 9) - 46 - dBc
OUT
= 20.2MHz, 82.5MHz Span (Notes 4, 7, 9) - 54 - dBc
OUT
= 32.9MHz, 62.5MHz Span (Notes 4, 7) - 51 - dBc
OUT
= 10.1MHz, 62.5MHz Span (Notes 4, 7) - 61 - dBc
OUT
= 40.4MHz, 50MHz Span (Notes 4, 7) - 48 - dBc
OUT
= 20.2MHz, 50MHz Span (Notes 4, 7) - 56 - dBc
OUT
= 5.04MHz, 50MHz Span (Notes 4, 7) - 68 - dBc
OUT
UNITSMIN TYP MAX
AC CHARACTERISTICS HI5660IB, HI5660IA - 125MHz
Spurious Free Dynamic Range,
SFDR Within a Window
Total Harmonic Distortion (THD) to
Nyquist
Spurious Free Dynamic Range,
SFDR to Nyquist
= 125MSPS, f
f
CLK
= 100MSPS, f
f
CLK
f
= 100MSPS, f
CLK
= 125MSPS, f
f
CLK
= 125MSPS, f
f
CLK
= 100MSPS, f
f
CLK
= 100MSPS, f
f
CLK
= 100MSPS, f
f
CLK
= 100MSPS, f
f
CLK
= 32.9MHz, 10MHz Span (Notes 4, 7) - 70 - dBc
OUT
= 5.04MHz, 4MHz Span (Notes 4, 7) - 73 - dBc
OUT
= 2.00MHz (Notes 4, 7) - 67 - dBc
OUT
= 32.9MHz, 62.5MHz Span (Notes 4, 7) - 51 - dBc
OUT
= 10.1MHz, 62.5MHz Span (Notes 4, 7) - 61 - dBc
OUT
= 40.4MHz, 50MHz Span (Notes 4, 7) - 48 - dBc
OUT
= 20.2MHz, 50MHz Span (Notes 4, 7) - 56 - dBc
OUT
= 5.04MHz, 50MHz Span (Notes 4, 7) - 68 - dBc
OUT
= 2.51MHz, 50MHz Span (Notes 4, 7) - 68 - dBc
OUT
AC CHARACTERISTICS HI5660/6IB, HI5660/6IA - 60MHz
Spurious Free Dynamic Range,
SFDR Within a Window
Total Harmonic Distortion (THD) to
Nyquist
Spurious Free Dynamic Range,
SFDR to Nyquist
= 60MSPS, f
f
CLK
= 50MSPS, f
f
CLK
= 50MSPS, f
f
CLK
= 50MSPS, f
f
CLK
f
= 50MSPS, f
CLK
= 60MSPS, f
f
CLK
= 60MSPS, f
f
CLK
= 50MSPS, f
f
CLK
= 50MSPS, f
f
CLK
f
= 50MSPS, f
CLK
= 50MSPS, f
f
CLK
= 25MSPS, f
f
CLK
= 10.1MHz, 10MHz Span (Notes 4, 7) - 62 - dBc
OUT
= 5.02MHz, 2MHz Span (Notes 4, 7) - 73 - dBc
OUT
= 1.00MHz, 2MHz Span (Notes 4, 7) - 74 - dBc
OUT
= 2.00MHz (Notes 4, 7) - 67 - dBc
OUT
= 1.00MHz (Notes 4, 7) - 68 - dBc
OUT
= 20.2MHz, 30MHz Span (Notes 4, 7) - 54 - dBc
OUT
= 10.1MHz, 30MHz Span (Notes 4, 7) - 60 - dBc
OUT
= 20.2MHz, 25MHz Span (Notes 4, 7) - 53 - dBc
OUT
= 5.02MHz, 25MHz Span (Notes 4, 7) - 67 - dBc
OUT
= 2.51MHz, 25MHz Span (Notes 4, 7) - 68 - dBc
OUT
= 1.00MHz, 25MHz Span (Notes 4, 7) - 68 - dBc
OUT
= 5.02MHz, 25MHz Span (Notes 4, 7) - 71 - dBc
OUT
VOLTAGE REFERENCE
Internal Reference Voltage, V
FSADJ
Internal Reference Voltage Drift - ±60 Internal Reference Output Current
Voltage at Pin 18 with Internal Reference 1.04 1.16 1.28 V
ppm/
- 0.1 - µA
Sink/Source Capability
Reference Input Impedance -1-MΩ
Reference Input Multiplying Bandwidth (Note 7) - 1.4 - MHz
DIGITAL INPUTS D7-D0, CLK
Input Logic High Voltage with
5V Supply, V
IH
Input Logic High Voltage with
3V Supply, V
IH
(Note 3) 3.5 5 - V
(Note 3) 2.1 3 - V
o
C
4
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