Intersil Corporation HI5630 Datasheet

HI5630
Data Sheet October 1999
Triple 8-Bit, 80MSPS A/D Converter with Internal Voltage Reference
The HI5630 can be bench tested using a complete ADC evaluation board with clock drivers, ADC, latches and a reconstruct DAC. In addition, complete LCD monitor reference designs are available for immediate volume production (contact factory).
Ordering Information
TEMP.
PART NUMBER
HI5630CN 0 to 70 64 Ld MQFP Q64.14x14 HI5630EVAL 25 ADC Evaluation Platform
RANGE (oC) PACKAGE PKG. NO.
File Number 4645.1
Features
• Triple 8-Bit A/D Converter on a Monolithic Chip
• Sampling Rate . . . . . . . . . . . . . . . . . . . . . . . . . . .80MSPS
• ENOB (f
= 1MHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.6
IN
• Wide Full Power Input Bandwidth. . . . . . . . . . . . . 300MHz
• Internal Band-Gap Voltage Reference . . . . . . . . . . . . 2.5V
• Excellent Channel-to-Channel Isolation. . . . . . . . . >75dB
• Single Supply Voltage Operation . . . . . . . . . . . . . . . . +5V
• On-Chip Sample and Hold Amplifiers
• Clock Output
• Offset Binary or Two’s Complement Output Format
• Stand-By Low Power mode
Applications
• LCD Monitors, Projectors and Plasma Display Panels
• Video Digitizing (RGB, Composite or Y-C)
• Medical Imaging
• High Speed Multi-Channel Data Acquisition
Pinout
HI5630
(MQFP)
TOP VIEW
GD0
BD7
BD5
BD4
BD3
DGND
DVDDBD2
BD1
BD0
N/C
RD6
RD7
DFS
N/C
BD6
58
64 63 62 616059
DGND
DV
DGND
DV
CLKOUT
CLKIN
DV
DGND
DV
DGND
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
DD
GD1 GD2
GD3
DD
DD
GD4 GD5 GD6
DD
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
N/C
RD0
RD1
GD7
57
56 55 54 53 52 51 50 49
RD4
DD
DV
DGND
RD5
RD2
RD3
| Copyright © Intersil Corporation 1999
STBY
AGND
DD
AV
AGND
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
AGND
AV
DD
AGND B
+
IN
B
-
IN
BV
DC
AGND V
RIN
V
ROUT
AV
DD
GIN + G
-
IN
GV
DC
AGND AV
DD
R
+
IN
R
-
IN
RV
DC
Functional Block Diagram
HI5630
GV
GIN+
RV
R
DC
GIN-
DC
RIN-
IN
DC BIAS
+
S/H
STAGE M - 6
RD0 (LSB) RD1 RD2 RD3 RD4 RD5 RD6 RD7 (MSB)
GD0 (LSB) GD1 GD2 GD3 GD4 GD5 GD6 GD7 (MSB)
BD0 (LSB) BD1 BD2 BD3 BD4 BD5 BD6 BD7 (MSB)
+
-
X2
X2
SAME AS
RED ABOVE
2-BIT
FLASH
2-BIT
FLASH
2-BIT
DAC
STAGE M
DIGITAL DELAY
AND
DIGITAL ERROR
CORRECTION
BV
V
ROUT
BIN­BN+
V
DC
RIN
SAME AS
RED ABOVE
REFERENCE
2
AV
POWER
AGND DVDDDGND
DD
DFS
STBY CLKIN
CLKOUT
Typical Video Application Schematic
HI5630
AV
DD
DV
DD
HI5630
+
R
IN
0.1µF
+
G
IN
0.1µF
+
B
IN
0.1µF
1.0µF
DGND DVDD
+
(35) R
IN
(33) RVDC(2V) (34) RIN-
+
(40) G
IN
(38) GVDC(2V)
(39) GIN-
+
(47) B
IN
(45) BVDC(2V) (46) BIN-
(43) V
RIN
(42) V
ROUT
(51) STBY (52) DFS
(LSB) RD0 (19)
RD1 (20) RD2 (21) RD3 (22) RD4 (23) RD5 (26) RD6 (27)
(MSB) RD7 (28)
DGND
(LSB) GD0 (64)
GD1 (3) GD2 (4)
GD3 (5) GD4 (12) GD5 (13) GD6 (14)
(MSB) GD7 (18)
DGND
(LSB) BD0 (54)
BD1 (55) BD2 (56) BD3 (59) BD4 (60) BD5 (61) BD6 (62)
(MSB) BD7 (63)
DGND
RD0 RD1 RD2 RD3 RD4 RD5 RD6 RD7
GD0 GD1 GD2 GD3 GD4 GD5 GD6 GD7
BD0 BD1 BD2 BD3 BD4 BD5 BD6 BD7
CLOCK IN
AGND DGND
3
(9) CLK IN
CLK OUT (8)
DGNDAGND
CLOCK OUT
Pin Descriptions
HI5630
PIN NO. NAME DESCRIPTION
1 DGND Digital Ground 2DVDDDigital Supply (5.0V) 3 GD1 Green Data Bit 1 Output 4 GD2 Green Data Bit 2 Output 5 GD3 Green Data Bit 3 Output 6 DGND Digital Ground 7DVDDDigital Supply (5.0V) 8 CLK OUT Sample Clock Output 9 CLK IN Sample Clock Input
10 DV
DD
Digital Supply (5.0V) 11 DGND Digital Ground 12 GD4 Green Data Bit 4 Output 13 GD5 Green Data Bit 5 Output 14 GD6 Green Data Bit 6 Output 15 DV
DD
Digital Supply (5.0V) 16 DGND Digital Ground 17 NC No Connection 18 GD7 Green Data Bit 7 Output 19 RD0 Red Data Bit 0 Output 20 RD1 Red Data Bit 1 Output 21 RD2 Red Data Bit 2 Output 22 RD3 Red Data Bit 3 Output 23 RD4 Red Data Bit 4 Output 24 DGND Digital Ground 25 DV
DD
Digital Supply (5.0V) 26 RD5 Red Data Bit 5 Output 27 RD6 Red Data Bit 6 Output 28 RD7 Red Data Bit 7 Output 29 NC No Connection 30 AGND Analog Ground 31 AV
DD
Analog Supply (5.0V) 32 AGND Analog Ground
PIN NO. NAME DESCRIPTION
33 RV
DC
Red DC Bias Voltage Output (2.0) 34 RIN- Red Negative Analog Input 35 RIN+ Red Positive Analog Input 36 AV
DD
Analog Supply (5.0V) 37 AGND Analog Ground 38 GV
DC
Green DC Bias Voltage Output 39 GIN- Green Negative Analog Input 40 GIN+ Green Positive Analog Input 41 AV 42 V
ROUT
43 V
DD
RIN
Analog Supply (5.0V)
+2.5V Reference Voltage Output
+2.5V Reference Voltage Input 44 AGND Analog Ground 45 BV
DC
Blue DC Bias Voltage Output 46 BIN- Blue Negative Analog Input 47 BIN+ Blue Positive Analog Input 48 AGND Analog Ground 49 AV
DD
Analog Supply (5.0V) 50 AGND Analog Ground 51 STBY Stand-By Power Mode 52 DFS Data Format Select Input 53 NC No Connection 54 BD0 Blue Data Bit 0 Output 55 BD1 Blue Data Bit 1 Output 56 BD2 Blue Data Bit 2 Output 57 DV
DD
Digital Supply (5.0V) 58 DGND Digital Ground 59 BD3 Blue Data Bit 3 Output 60 BD4 Blue Data Bit 4 Output 61 BD5 Blue Data Bit 5 Output 62 BD6 Blue Data Bit 6 Output 63 BD7 Blue Data Bit 7 Output 64 GD0 Green Data Bit 0 Output
4
HI5630
Absolute Maximum Ratings T
Supply Voltage, AVDD or DVDD to AGND or DGND . . . . . . . . . . .6V
DGND to AGND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3V
Digital I/O Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . DGND to DV
Analog I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . AGND to AV
= 25oC Thermal Information
A
Thermal Resistance (Typical, Note 1) θJA (oC/W)
HI5630CN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
DD DD
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
Operating Conditions
(Lead Tips Only)
Temperature Range
HI5630CN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 70oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on a 1S2P (1 Signal and 2 Power) evaluation PC board in free air.
Electrical Specifications AV
= 5V, DVDD = 5V; Single Ended Inputs, V
DD
T
=25oC; Unless Otherwise Specified
A
= 2.5V; fS = 80MSPS at 50% Duty Cycle; CL= 10pF;
RIN
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
ACCURACY
Resolution - 8 - Bits Integral Linearity Error, INL fIN = 1MHz - ±0.4 ±2.0 LSB Differential Linearity Error, DNL
fIN = 1MHz - ±0.2 ±1.0 LSB
(Guaranteed No Missing Codes) Channel Offset Match fIN = DC - 1 - LSB Channel Full Scale Error Match fIN = DC - 0.25 - LSB Offset Code, V
OC
VIN+ = VIN- - 140 - CODE Full Scale Error, FSE fIN = DC - 1 - LSB Bit Error Rate (BER) --- s
ANALOG INPUT
Analog Input Range (Note 2) - 0.95 1 V Analog Input Resistance VIN+ = VIN-= V
REF
-1-M Analog Input Capacitance - 10 - pF Analog Input Bias Current VIN+ = VIN- = V
REF
-10 1.0 10 µA Full Power Input Bandwidth, FPBW - 300 - MHz INTERNAL VOLTAGE REFERENCE 1µF Decoupling Cap Needed Reference Output Voltage, V Reference Output Current, I
REF
ROUT
I
= 4mA 2.33 2.5 2.67 V
REF
V Applied = 2.5V - 2 4 mA Reference Temperature Coefficient - 6 - µV/oC DC BIAS PINS RVDC, GVDC, BVDC with 0.1µF Decoupling Cap Needed VDC Output Voltage (Loaded) - 1.97 - V VDC Output Current, I
VDC
---mA
VDC Temperature Coefficient - 60 - µV/oC
REFERENCE VOLTAGE INPUT
Reference Voltage Input, V
RIN
Total Reference Resistance, R Reference Current, I
RIN
RIN
(Note 2) 2.2 2.5 2.8 V
V
= 2.5V - 2.93 - k
RIN
V
= 2.5V - 0.95 - mA
RIN
DYNAMIC CHARACTERISTICS
Minimum Conversion Rate No Missing Codes 1 - - MSPS Maximum Conversion Rate No Missing Codes - - 80 MSPS Overclocking Conversion Rate No Missing Codes - 95 - MSPS Transient Response - 1 - Cycle
5
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