Intersil Corporation HI-201HS Datasheet

HI-201HS

Data Sheet July 1999

High Speed, Quad SPST, CMOS Analog
Switch

The HI-201HS is a monolithic CMOS Analog Switch
featuring very fast switching speeds and low ON resistance.
The integrated circuit consists of four independently
selectable SPST switches and is pin compatible with the
industry standard HI-201 switch.

Fabricated using silicon-gate technology and the Intersil
Dielectric Isolation process, this TTL compatible device off ers
improved performance ov er pre viously av ailab le CMOS analog
switches. F eaturing maximum

switching times of 50ns, low ON

resistanceof50Ωmaximum,andawideanalogsignalrange,the
HI-201HS is designed for any application where improv ed
switching performance, particularly switching speed, is required.
(A more detailed discussion on the design and application of the
HI-201HS can be found in Application Note AN543.)

Ordering Information

TEMP.

PART NUMBER

RANGE (oC) PACKAGE

HI1-0201HS-2 -55 to 125 16 Ld CERDIP F16.3
HI1-0201HS-4 -25 to 85 16 Ld CERDIP F16.3
HI1-0201HS-5 0 to 75 16 Ld CERDIP F16.3
HI3-0201HS-5 0 to 75 16 Ld PDIP E16.3
HI4P0201HS-5 0 to 75 20 Ld PLCC N20.35
HI9P0201HS-5 0 to 75 16 Ld SOIC M16.3
HI9P0201HS-9 -40 to 85 16 Ld SOIC M16.3

PKG.

NO.

File Number

3123.2

Features

• Fast Switching Times

-t

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30ns

ON

-t

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40ns

OFF

• Low “ON” Resistance . . . . . . . . . . . . . . . . . . . . . . . . 30Ω

• Pin Compatible with Standard HI-201

• Wide Analog Voltage Range (±15V Supplies) . . . . . . . ±15V

• Low Charge Injection (±15V Supplies) . . . . . . . . . . 10pC

• TTL Compatible

• Symmetrical Switching Analog Current Range . . . . . 80mA

Applications

• High Speed Multiplexing

• High Frequency Analog Switching

• Sample and Hold Circuits

• Digital Filters

• Operational Amplifier Gain Switching Networks

• Integrator Reset Circuits

Pinouts

(Switches Shown For Logic “1” Input)

HI-201HS (CERDIP, PDIP, SOIC)

TOP VIEW

16

A

OUT1

IN1

GND

IN4

OUT4

A

1

1

2
3
4

V-

5
6
7
8

4

A

2

15

OUT2

14

IN2

13

V+

12

NC

11

IN3

10

OUT3

9

A

3

1

HI201HS (PLCC)

TOP VIEW

1

OUT 1

A

2

3

4

IN 1

5

V-

6
7

GND

IN 4

8

10 11

9

A

OUT 4

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

2

OUT 2

A

19

1

20

18

IN 2

17

V+
16
15

IN 3

14

12

4

13

3

A

OUT 3

HI-201HS

Functional Diagram

V+

TTL

LOGIC

INPUT

LEVEL

SHIFTER

AND

DRIVER

V-

GATE

Schematic Diagrams

TTL/CMOS REFERENCE CIRCUIT SWITCH CELL

V+

QN41

QN42

D41

P41

5V

QP42

MP42

MP43

QN43

R42

R41

D42

5.6V

QP41

SWITCH

CELL

C48

C49

SOURCE

DRAIN

MP44

QP44

GATE

QN44

OUTPUT

QN45

V

INPUT

R1

MP45

V+

ANALOG

V-

TRUTH TABLE

LOGIC SWITCH

0
1

Q

MN31

IN

MP32

MN33

MP33

MP31

Q

ON

OFF

ANALOG
OUT

MN32

MN42

V-

MN44

MN45

2

HI-201HS

Schematic Diagrams

M

I

Q

REPEAT FOR EACH
LEVEL SHIFTER

N46

M

P51

M

I

X3

I

X4

VA

I

X1

I

X2

M

M

N51

N52

(Continued)

P52

Q

N6

I

X1

Q

N1

C

1

Q

P1

I

X3

Q

P6

DIGITAL INPUT BUFFER AND LEVEL SHIFTER

M

P3

N5

P4

M

P5

Q

N2

R

3

C

R

M

N3

2

2

Q

P2

M

N5

M

N4

Q

N8

Q

Q

N7

I

V

X2

R1

I

Q

R

1

Q

P4

V

R1

C

FF

Q

P7

Q

Q

P8

M

N9

Q

N4

Q

Q

P5

P9

M

P8

M

P7

M

P6

M

N6

M

P9

M

N9

M

M

N7

N8

M

P10

M

M

N11

V

EE

V

CC

M

P13

M

N10

M

N13

P11

M

P12

M

N12

Q

Q

M

P14

M

N14

3

HI-201HS

Absolute Maximum Ratings Thermal Information

Supply Voltage (V+ to V-). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V

Digital Input Voltage. . . . . . . . . . . . . . . . . . . . . . (V+) +4V to (V-) -4V

Analog Input Voltage (One Switch) . . . . . . . (V+) +2.0V to (V-) -2.0V

Peak Current, S or D (Pulse 1ms, 10% Duty Cycle Max) . . . . 50mA

Continuous Current Any Terminal (Except S or D) . . . . . . . . . 25mA

Operating Conditions

Temperature Ranges

HI-201HS-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC

HI-201HS-4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25oC to 85oC

HI-201HS-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 75oC

HI-201HS-9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. θJA is measured with the component mounted on an evaluation PC board in free air.

Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W)

CERDIP Package. . . . . . . . . . . . . . . . . 80 30

PDIP Package . . . . . . . . . . . . . . . . . . . 90 N/A

PLCC Package. . . . . . . . . . . . . . . . . . . 80 N/A

SOIC Package . . . . . . . . . . . . . . . . . . . 100 N/A

Maximum Junction Temperature

Ceramic Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175oC

Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC

Maximum Storage Temperature. . . . . . . . . . . . . . . . -65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC

(SOIC, PLCC - Lead Tips Only)

Electrical Specifications Supplies = +15V, -15V; V

(Logic Level High) = 2.4V, VAL (Logic Level Low) = +0.8V, GND = 0V,

AH

Unless Otherwise Specified

-2 -4, -5, -9
UNITSMIN TYP MAX MIN TYP MAX

PARAMETER

TEST

CONDITIONS

TEMP

(oC)

DYNAMIC CHARACTERISTICS

Switch ON Time, t
Switch OFF Time, t
Switch OFF Time, t

ON

OFF1
OFF2

(Note 3) 25 - 30 50 - 30 50 ns
(Note 3) 25 - 40 50 - 40 50 ns

(Note 3) 25 - 150 - - 150 - ns
Output Settling Time To 0.1% 25 - 180 - - 180 - ns
Charge Injection, Q (Note 6) 25 - 10 - - 10 - pC
OFF Isolation (Note 4) 25 - 72 - - 72 - dB
Crosstalk (Note 5) 25 - 86 - - 86 - dB
Input Switch Capacitance, C

S(OFF)

Output Switch Capacitance C

Digital Input Capacitance, C
Drain-To-Source Capacitance, C

A

DS(OFF)

D(OFF)

C

D(ON)

25-10- -10-pF
25-10- -10-pF
25-30- -30-pF
25-18- -18-pF
25 - 0.5 - - 0.5 - pF

DIGITAL INPUT CHARACTERISTICS

Input Low Threshold, V
Input High Threshold, V

AL

AH

Full - - 0.8 - - 0.8 V

25 2.0 - - 2.0 - - V

Full 2.4 - - 2.4 - - V

Input Leakage Current (Low), I

AL

25 - 200 - - 200 - µA

Full - - 500 - - 500 µA

Input Leakage Current (High), I

AH

VAH = 4.0V 25 - 20 - - 20 - µA

Full - - 40 - - 40 µA

ANALOG SWITCH CHARACTERISTICS

Analog Signal Range, V
ON Resistance, r

ON

S

(Note 2) 25 - 30 50 - 30 50 Ω

Full -15 - +15 -15 - +15 V

Full - - 75 - - 75 Ω

4