Intersil Corporation HI-1828A, HI-1818A Datasheet

TM
HI-1818A, HI-1828A
Data Sheet July 1999
Low Resistance, Single 8-Channel, and Differential 4-Channel, CMOS Analog Multiplexers
The Hl-1818A and HI-1828A are monolithic, high performance CMOS analog multiplexers offering built-in channel selection decoding plus an inhibit (enable) input for disabling all channels. Dielectric Isolation (Dl) processing is used for enhanced reliability and performance (see Application Note 521). Substrate leakage and parasitic capacitance are much lower, resulting in extremelylowstatic errors and high throughput rates. Low output leakage (typically 0.1nA) and low channel ON resistance (250) assure optimum performance in low level or current mode applications.
The HI-1818A is a single-ended, 8-Channel multiplexer, while the HI-1828A is a differential 4-Channel version. Either de vice is ideally suitedformedical instrumentation,telemetry systems, and microprocessor based data acquisition systems.
For MIL-STD-883 compliant parts, request the HI-1818A/883.
File Number 3141.2
Features
• Signal Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +15V
• “ON” Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . 250
• Input Leakage (Max) . . . . . . . . . . . . . . . . . . . . . . . . 50nA
• Access Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 350ns
• Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . 5mW
• DTL/TTL Compatible Address
o
• Operation . . . . . . . . . . . . . . . . . . . . . . . . . -55
C to 125oC
Applications
• Data Acquisition Systems
• Precision Instrumentation
• Demultiplexing
• Selector Switch
Ordering Information
Pinouts
ADDRESS A
ADDRESS A
+5V SUPPLY
ENABLE
IN 8 IN 7 IN 6 IN 5
HI-1818A (CERDIP)
TOP VIEW
1
1
2 3 4
2
5 6 7 8
16
ADDRESS A
15
-V
SUPPLY
14
+V
SUPPLY
13
IN 1
12
OUT
11
IN 2
10
IN 3
9
IN 4
PART NUMBER
TEMP.
RANGE (oC) PACKAGE
PKG.
NO.
HI1-1818A-2 -55 to 125 16 Ld CERDIP F16.3 HI1-1818A-5 0 to 75 16 Ld CERDIP F16.3 HI1-1828A-2 -55 to 125 16 Ld CERDIP F16.3 HI3-1828A-5 0 to 75 16 Ld PDIP E16.3
HI-1828A (CERDIP, PDIP)
TOP VIEW
16
ADDRESS A
15
-V
SUPPLY
14
+V
SUPPLY
13
IN 1
12
OUT 1 THRU 4
11
IN 2
10
IN 3
9
IN 4
0
IN 8 IN 7 IN 6 IN 5
1
1
2 3 4 5 6 7 8
0
ADDRESS A
+5V SUPPLY
ENABLE
OUT 5 THRU 8
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Copyright © Intersil Corporation 1999
Truth Tables
HI-1818A TRUTH TABLE
ADDRESS
2
A
1
A
EN
0
“ON” CHANNELA
LLLL 1 LLHL 2 LHLL 3
LHHL 4 HLLL 5 HLHL 6 HHLL 7 HHHL 8 X X X H None
Functional Block Diagrams
DIGITAL ADDRESS
A
0
A
1
HI-1818A, HI-1828A
1
L L L 1 and 5
L H L 2 and 6 H L L 3 and 7 H H L 4 and 8 X X H None
HI-1818A
A
2
ENABLE
HI-1828A TRUTH TABLE
ADDRESS
A
0
EN
“ON” CHANNELA
ADDRESS
INPUT
BUFFERS
ADDRESS
INPUT
BUFFERS
ENABLE BUFFER
DECODERS
MULTIPLEX
SWITCHES
N
P
N P
IN 1
OUT IN 8
HI-1828A
A
0
A
1
ENABLE
DECODERS
ENABLE BUFFER
MULTIPLEX
SWITCHES
N
P
N P
IN 1
OUT 1-4
IN 4
IN 5
N P
OUT 5-8
IN 8
N P
2
Schematic Diagrams
HI-1818A, HI-1828A
ADDRESS INPUT BUFFER
P3
All N-Channel Bodies to V­All P-Channel Bodies to V+ Unless Otherwise Specified
All N-Channel Bodies to V­All P-Channel Bodies to V+ A2 or A2 not used for HI-1828A
200
ADDRESS
INPUT
EN
D1
D2
V+
V-
A2 OR
A2
P1 N1
P2
N2
A1 OR
A1
N12N11
V
CC
P4
N4
N3
ADDRESS DECODER
V+
P11
P12
A0
P13
P14
N14
A0 OR
N13
P5
A
P7
P6
N7
N6
N5
V-
P15
N15
P8
N8
P16
N16
P9
N9
TO P-CHANNEL SWITCH
TO N-CHANNEL SWITCH
P10
N10
A
All N-Channel Bodies to V­All P-Channel Bodies to V+ Unless Otherwise Specified
V-
IN SWITCH CELL
MULTIPLEXER SWITCH
FROM DECODE
N18
V+
N19
P17
FROM DECODE
N17
OUTIN
V+
P18
3
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