Intersil Corporation HI1386Y Datasheet
SEMICONDUCTOR
HI1386Y
April 1995
Features
• Differential Linearity Error . . . . . . . . ±0.5 LSB or Less
• Integral Linearity Error . . . . . . . . . . . ±0.5 LSB or Less
• Built-In Integral Linearity Compensation Circuit
• High-Speed Operation with Maximum Conversion
Rate of 75 MSPS (Min)
• Low Input Capacitance . . . . . . . . . . . . . . . . 17pF (Typ)
• Wide Analog Input Bandwidth . . . . . . . . . . . . . 150MHz
(Min. for Full Scale Input)
• Single Power Supply . . . . . . . . . . . . . . . . . . . . . . . -5.2V
• Low Power Consumption . . . . . . . . . . . . . 580mW (Typ)
• Low Error Rate
• Operable at 50% Clock Duty Cycle
• Capable of Driving 50Ω Loads
Applications
• Video Digitizing • Communication Systems
• HDTV (High Definition TV) • Radar Systems
• Direct RF Down-Conversion • Digital Oscilloscopes
8-Bit, 75 MSPS Flash A/D Converter
Description
This is a specification that outlines the mechanical and
electrical characteristics for the HI1386Y, 8-bit Flash A/D
converter IC, in chip (die) form.
Ordering Information
PART
NUMBER TEMPERATURE PACKAGE
HI1386Y +25oC Die
• All performance parameters are for packaged
devices when supplied by Harris.
Die Metallization Layer
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures.
Copyright
© Harris Corporation 1995
1
File Number
3959
Functional Block Diagram
V
62
R1
RT
R/2
R
R
R
COMPARATOR
1
2
HI1386Y
MINV
D7 (MSB)
D6
26
25
51, 52
51, 52
63
R
V
IN
R2
V
54
RM
V
IN
64
R
65
R
126
R
127
R
128
R
129
R
191
R
192
R
193
ENCODE
LOGIC
OUTPUT
D5
D4
D3
D2
D1
D0 (LSB)
24
21
16
15
13
12
R
254
R
255
R/2
RB
R3
CLOCK
DRIVER
LINV
V
46
CLK
39
CLK
38
2
Specifications HI1386Y
Absolute Maximum Ratings T
Supply Voltage (AV
Analog Input Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . -2.7V to +0.5V
Reference Input Voltage
, DVEE). . . . . . . . . . . . . . . . . . . . -7V to +0.5V
EE
= +25oC
A
VRM Pin Input Current (I
) . . . . . . . . . . . . . . . . . . .-3mA to +3mA
VRM
Digital Output Current (ID0 to ID7) . . . . . . . . . . . . . . .-30mA to 0mA
Storage Temperature Range (T
) . . . . . . . . . . . . -65oC to +150oC
STG
VRT, VRB, VRM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2.7V to +0.5V
|VRT -VRB|. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.5V
Digital Input Voltage
CLK, CLK, MINV, LINV. . . . . . . . . . . . . . . . . . . . . . . -4V to +0.5V
|CLK-CLK | . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.7V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Supply Voltage
AVEE, DVEE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5.5V to -4.95V
AVEE- DVEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.05V to 0.05V
AGND - DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.05V to 0.05V
Reference Input Voltage
VRT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.1V to 0.1V
VRB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2.2V to -1.8V
Electrical Specifications T
= +25oC, AVEE = DVEE = -5.2V, VRT = 0V, VRB = -2V
A
PARAMETER TEST CONDITIONS MIN MAX UNIT
Differential Linearity Error (DNL)
(00000000 to 11111111)
Analog Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . VRB to V
Pulse Width of Clock
T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6.6ns Min.
PW1
T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6.6ns Min.
PW0
-0.5 0.5 LSB
RT
Integral Linearity Error (INL)
-0.5 0.5 LSB
(00000000 to 11111111)
Resolution 8 - Bits
Input Bias Current, L
IN
Analog Input Resistance, R
Resister-String Current, I
Reference Voltage, V
REF
RM
IN
VIN = -1.0V 0 160 µA
VIN = -1.0V 100 1000 kΩ
-22 -16 mA
-1.1 -0.9 V
Digital Input Current HI, Hi = -0.8V 0 40 µA
Digital Input Current LO, Lo = -1.6V -30 30 µA
CLK Open Voltage, V
Leakage (1) D0 to D7, V
OPN
LEAK
Leakage (2) D0 to D7,
VIN, LINV, MINV, CLK, CLK, I
Digital Output Voltage HI, V
OH
Digital Output Voltage LO, V
Supply Current, I
EE
LEAK
OL
CLK = Open -1.4 -1.2 V
I = -10µA -0.8 -0.4 V
V = 0.3V -1.0 1.0 µA
220Ω to -5.2V -1.095 -0.6 V
220Ω to -5.2V -2 -1.64 V
-140 -70 mA
3
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