Intersil Corporation HI1166 Datasheet

HI1166

September 1998 File Number 3579.4

8-Bit, 250 MSPS, Flash A/D Converter

The HI1166 is an 8-bit, ultra high speed, flash Analog-to­Digital converter IC capable of digitizing analog signals at a
maximum rate of 250 MSPS. The digital I/O levels of the
converter are compatible with ECL 100K/10KH/10K.

Applications

• Spectrum Analyzers • Video Digitizing

• Radar Systems • Communication Systems

• Direct RF Down-Conversion • Digital Oscilloscopes

Ordering Information

PART

NUMBER

HI1166AIL -20 to 100 68 Ld CLCC J68.A
HI1166-EV 25 Evaluation Board

TEMP. RANGE

(oC) PACKAGE PKG. NO.

Pinout

Features

• Differential Linearity Error . . . . . . . . . . ±0.5 LSB or Less

• Integral Linearity Error . . . . . . . . . . . . . ±0.5 LSB or Less

• Built-In Integral Linearity Compensation Circuit

• Ultra High Speed Operation with Maximum

Conversion Rate (Min) . . . . . . . . . . . . . . . . . . . 250 MSPS

• Low Input Capacitance 18pF (Typ)

• Wide Analog Input Bandwidth

(Min for Full Scale Input) . . . . . . . . . . . . . . . . . . . 250MHz

• Single Power Supply . . . . . . . . . . . . . . . . . . . . . . . . -5.2V

• Low Power Consumption . . . . . . . . . . . . . . . . . 1.4W (Typ)

• Low Error Rate

• Capable of Driving 50Ω Loads

• Evaluation Board Available

• Direct Replacement for Sony CXA1166K

HI1166

(CLCC)

TOP VIEW

NC
NC

D2
D2
D3

D3
DGND2
DGND2
DGND1

D4

D4

D5

D5

NC
NC
NC
NC

EEAVEE

AV

RTSVRT

RBS

V

DVEED1D1D0D0ORORLINVNCAVEEAVEEV

NC

876543216867666564636261

9

10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43

EE

NC

D6D6D7

DV

D7

MINV

CLK

CLK

NC

EE

NC

AV

AGND

60

NC

59

NC

58

AV

EE

57

NC

56

AGND

55

V

IN1

54

V

IN1

53

AGND

52

V

RM

51

AGND

50

V

IN2

49

V

IN2

48

AGND

47

NC

46

NC

45

NC

44

NC

EE

RB

NC

V

AV

AGND

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

Functional Block Diagram

R1

64

V

RT

V

65

RTS

V

V

IN1

RM

R2

54

55

R3

52

R/2

R

R

R

R

R

R

R

R

R

COMPARATOR

0

1

2

63

64

65

126

127

ENCODE

LOGIC

128

129

HI1166

MINV

33

OUTPUT

2

3

31
32
29
30
21
22
19
20
14
15
12
13

6
7
4
5

OR

OR

D7 (MSB)

D7

D6

D6
D5

D5
D4

D4
D3

D3
D2

D2
D1

D1
D0 (LSB)

D0

V

V

IN2

RBS

V

RB

CLK

CLK

R

191

R

49

50

R4

39

40

R5

35

34

192

R

193

R

254

R

255

R/2

CLOCK

DRIVER

1

LINV

2

HI1166

Absolute Maximum Ratings T

Supply Voltage (AVEE, DVEE) . . . . . . . . . . . . . . . . . . . .-7V to +0.5V

Analog Input Voltage (VIN). . . . . . . . . . . . . . . . . . . . . -2.7V to +0.5V

Reference Input Voltage

VRT, VRB, VRM. . . . . . . . . . . . . . . . . . . . . . . . . . . . -2.7V to +0.5V

|VRT-VRB|. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5V

Digital Input Voltage

= 25oC Thermal Information

A

Thermal Resistance (Typical, Note 2) θ

CLCC Package. . . . . . . . . . . . . . . . . . . 38 10

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . .2.1W

Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .175oC

Maximum Storage Temperature Range (T

Maximum Lead Temperature (Soldering, 10s). . . . . . . . . . . . .300oC

o

C/W θ

JA

). . . . -65oC to 150oC

STG

JC

o

C/W

MINV, LINV, CLK,CLK. . . . . . . . . . . . . . . . . . . . . . . .-4V to +0.5V

|CLK-CLK| . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V

VRM Pin Input Current (I

) . . . . . . . . . . . . . . . . . . -3mA to +3mA

VRM

Digital Output Current

(ID0 to ID7, IOR, ID0 to ID7, IOR) . . . . . . . . . . . . . -30mA to 0mA

Temperature Range, TA (Note 5) . . . . . . . . . . . . . . . -20oC to 100oC

TC . . . . . . . . . . . . . . . . . . . . . -20oC to 125oC

Operating Conditions (Note 1)

Supply Voltage MIN TYP MAX

AVEE, DVEE. . . . . . . . . . . . . . . . . . . . . . . -5.5V -5.2 -4.95V

AVEE - DVEE . . . . . . . . . . . . . . . . . . . . . . -0.05V 0 0.05V

AGND - DGND. . . . . . . . . . . . . . . . . . . . .-0.05V 0 0.05V

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

1. Electrical Specifications guaranteed within stated operating conditions.

2. θJA is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications T

= 25oC, AVEE = DVEE = -5.2V, VRT, V

A

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

SYSTEM PERFORMANCE

Resolution - 8 - Bits
Integral Linearity Error, INL f

= 250 MSPS - ±0.3 ±0.5 LSB

C

Differential Linearity Error, DNL fC = 250 MSPS - ±0.3 ±0.5 LSB

DYNAMIC CHARACTERISTICS

Signal to Noise Ratio, SINAD Input = 1kHz, Full Scale

RMS Signal

----------------------------------------------------------------- -=

RMS Noise Distortion+

fC = 250MHz
Input = 60kHz, Full Scale

fC = 250MHz

Error Rate Input = 50MHz, Full Scale

Error > 16 LSB, fC = 250MHz
Input = 62.499MHz, Full Scale

Error > 16 LSB, fC = 250MHz
Differential Gain Error, DG NTSC 40 IRE Mod.
Differential Phase Error, DP - 0.5 - Degree

Ramp, fC = 250 MSPS
Overrange Recovery Time - 1.0 - ns

Maximum Conversion Rate, f
Aperture Jitter, t
Sampling Delay, t

AJ

DS

C

ANALOG INPUT

Analog Input Capacitance, C
Analog Input Resistance, R
Input Bias Current, I

IN

IN

IN

Full Scale Input Bandwidth VIN = 2V

VIN - 1V + 0.07V

RMS

VIN = -1V 20 - 450 µA

P-P

REFERENCE INPUTS

Reference Resistance, R

REF

Reference Input Voltage MIN TYP MAX

VRT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.1V -2 0.1V

VRB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2.2V -2 -1.8V

Analog Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . .VRB to V

= 0V, VRB, V

RTS

= -2V (Note 1)

RBS

44 46 - dB

-37-dB

--10-9TPS
(Note 3)

-10-810

-6

TPS

(Note 3)

- 1.0 - %

250 - - MSPS

-9-ps

0.4 1.4 2.4 ns

-18-pF

50 120 - kΩ

200 250 - MHz

83 125 182 Ω

RT

3

HI1166

Electrical Specifications T

= 25oC, AVEE = DVEE = -5.2V, VRT, V

A

= 0V, VRB, V

RTS

= -2V (Note 1) (Continued)

RBS

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Residual Resistance R1 Note 2 0.1 0.6 2.0 Ω

R2 300 500 700 Ω
R3 0.5 2.0 5.0 Ω
R4 300 500 700 Ω
R5 0.1 0.6 2.0 Ω

DIGITAL INPUTS

Logic H Level, V
Logic L Level, V
Logic H Current, I
Logic L Current, I

IH

IL

IH

IL

Input Connected to GND 0 - 70 µA
Input Connected to -2V -50 - 50 µA

-1.13 - - V

- - -1.5 V

Input Capacitance -4-pF

DIGITAL OUTPUTS

Logic H Level, V
Logic L Level, V

OH

OL

RL = 50Ω -1.0 - - V
RL = 50Ω - - -1.6 V

TIMING CHARACTERISTICS

H Pulse Width of Clock, t
L Pulse Width of Clock, t
Output Rise Time, t
Output Fall Time, t
Output Delay, t

r

f

OD

PW1

PW0

RL = 50Ω - 0.6 1.5 ns
RL = 50Ω - 0.6 1.5 ns
RL = 50Ω 1.8 2.5 3.2 ns

1.8 - - ns

1.8 - - ns

POWER SUPPLY CHARACTERISTICS

Supply Current, I

EE

Power Consumption, P

D

Note 4 - 1.4 1.9 W

-360 -270 - mA

NOTES:

1. Electrical Specifications guaranteed within stated operating conditions.

2. See Functional Block Diagram.

3. TPS: Times Per Sample.

4.

PD I

EEAAVEEIEEDDVEE

VRTVRB–()

-------------------------------------+•+•=

R

5. TAis specified instillairandwithoutheatsink. To extend temperature range, appropriate heat management techniques must be employed (See

2

REF

Figure 2).

Timing Diagram

ANALOG IN

DIGITAL OUT

CLK

CLK

t

SD

N

t

PW1

t

OD

t

PW0

20%

N + 1

80%

N + 2

NN - 1

t

r

80%

N + 1

20%

t

f

FIGURE 1.

4