The HFA3102 is an all NPN transistor array configured as
dual differential amplifiers with tail transistors. Based on
Intersil bonded wafer UHF-1 SOI process, this array
achieves very high f
h
and VBE matching characteristics over temperature.
FE
(10GHz) while maintaining excellent
T
Collector leakage currents are maintained to under 0.01nA.
Ordering Information
TEMP.
PART NUMBER
HFA3102B-40 to 8514 Ld SOICM14.15
HFA3102B96-40 to 8514 Ld SOIC Tape
Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC
Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical SpecificationsT
= 25oC
A
(NOTE 2)
ALL GRADES
TEST
SYMBOLSPARAMETERTEST CONDITIONS
V
(BR)CBO
Collector-to-Base Breakdown Voltage
IC = 100µA, IE = 0A1218-V
LEVEL
UNITSMINTYPMAX
(Q1, Q2, Q4, and Q5)
V
(BR)CEO
Collector-to-Emitter Breakdown
IC = 100µA, IB = 0A812-V
Voltage (Q1 thru Q6)
V
(BR)EBO
Emitter-to-Base Breakdown Voltage (Q
IE = 50µA, IC = 0A5.56-V
3
and Q6)
I
CBO
I
EBO
h
FE
C
CB
C
EB
f
T
f
MAX
G
NFMIN
NF
MIN
NF
50Ω
h
FE1/hFE2
V
OS
Collector Cutoff Current
VCB = 5V, IE = 0A-0.110nA
(Q1, Q2, Q4, and Q5)
Emitter Cutoff Current (Q3 and Q6)V
DC Current Gain (Q1 thru Q6)I
= 1V, IC = 0A--100nA
EB
= 10mA, VCE = 3VA4070--
C
Collector-to-Base CapacitanceVCB = 5V, f = 1MHzB-300-fF
Emitter-to-Base CapacitanceVEB = 0, f = 1MHzB-200-fF
Current Gain-Bandwidth ProductIC = 10mA, VCE = 5VC-10-GHz
Power Gain-Bandwidth ProductIC = 10mA, VCE = 5VC-5-GHz
Availab le Gain at Minimum Noise FigureIC = 3mA,
f = 0.5GHzC-17.5-dB
VCE = 3V
f = 1.0GHzC-12.4-dB
Minimum Noise FigureIC = 3mA,
f = 0.5GHzC-1.8-dB
VCE = 3V
f = 1.0GHzC-2.1-dB
50Ω Noise FigureIC = 3mA,
f = 0.5GHzC-3.3-dB
VCE = 3V
f = 1.0GHzC-3.5-dB
DC Current Gain Matching
IC = 10mA, VCE = 3VA0.91.01.1-
(Q1 and Q2, Q4 and Q5)
Input Offset Voltage (Q1 and Q2),
IC = 10mA, VCE = 3VA-1.55mV
(Q4 and Q5)
I
OS
Input Offset Current (Q1 and Q2),
IC = 10mA, VCE = 3VA-525µA
(Q4 and Q5)
3-450
HFA3102
Electrical SpecificationsT
SYMBOLSPARAMETERTEST CONDITIONS
dVOS/dTInput Offset Voltage TC
(Q1 and Q2, Q4 and Q5)
I
TRENCH-
LEAKAGE
NOTE:
2. Test Level: A. Production Tested; B. Typical or Guaranteed Limit Based on Characterization; C. Design Typical for Information Only
Collector-to-Collector Leakage
(Pin 6, 7, 13, and 14)
FIGURE 5. GAIN AND NOISE FIGURE vs FREQUENCYFIGURE 6. P
3-453
C
3rd ORDER INTERCEPT POINT
1dB COMPRESSION POINT
3RD ORDER PRODUCTS
, INPUT POWER (dBm)
P
IN
AND 3RD ORDER INTERCEPT
1dB
VCE = 5V
I
= 10mA
C
f = 1GHz
Die Characteristics
HFA3102
PROCESS:
UHF-1
DIE DIMENSIONS:
53 mils x 52 mils x 14 mils
1340µm x 1320µm x 355.6µm
METALIZATION:
Type: Metal 1: AlCu(2%)/TiW
Thickness: Metal 1: 8k
Å ±0.5kÅ
Type: Metal 2: AlCu(2%)
Thickness: Metal 2: 16k
Å ±0.8kÅ
Metallization Mask Layout
2
HFA3102
TOP VIEW
114
PASSIVATION:
Type: Nitride
Thickness: 4k
Å ±0.5kÅ
SUBSTRATE POTENTIAL (Powered Up):
Floating
13
1340µm
(53 mils)
12
3
11
4
10
5
9876
1320µm
(52 mils)
Pad numbers correspond to the 14 pin SOIC pinout.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
3-454
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