intersil HFA1150 DATA SHEET

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Data Sheet June 2004

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HFA1150

FN4836.1

700MHz, SOT-23, Low Distortion Current
Feedback Operational Amplifier

The HFA1150 is a high-speed, wideband, fast settling op
amp built with Intersil's proprietary complementary bipolar
UHF-1 process. The current feedback architecture delivers
superb bandwidth even at very high gains (>300MHz at
A

= 10), and the low distortion and excellent video

V

parameters make this amplifier ideal for communication and
professional video applications.

Though specified for ±5V operation, the HFA1150 operates
with single supply voltages as low as 4.5V, and requires only

3.4mA of I

in 5V applications (see Application Information

cc

section, and Application Note AN9891).
For a lower power amplifier in a SOT-23 package, please

refer to the HFA1155 data sheet.

Part # Information

TEMP.

PART NUMBER

(BRAND)

HFA1150IB
(H1150I)

HFA1150IB96
(H1150I)

HFA1150IH96
(1150)

HFA11XXEVAL DIP Evaluation Board for High-Speed Op

OPAMPSOT23EVAL SOT-23 Evaluation Board for High-Speed Op

RANGE

o

(

C) PACKAGE PKG. NO.

-40 to 85 8 Ld SOIC M8.15

-40 to 85 8 Ld SOIC
Tape and Reel

-40 to 85 5 Ld SOT-23 Tape
and Reel

Amps

Amps

M8.15

P5.064

Features

• Low Distortion (5MHz, HD2) . . . . . . . . . . . . . . . . . -67dBc

• a-3dB Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . 700MHz

• High Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . 2700V/µs

• Fast Settling Time (0.1%). . . . . . . . . . . . . . . . . . . . . 20ns

• Excellent Gain Flatness . . . . . . . . . . ±0.05dB to 100MHz

• High Output Current. . . . . . . . . . . . . . . . . . . . . . . . . 60mA

• Fast Overdrive Recovery . . . . . . . . . . . . . . . . . . . . . <5ns

• Operates with 5V Single Supply (See AN9891)

Applications

• Video Switching and Routing

• Pulse and Video Amplifiers

• RF/IF Signal Processing

• Flash A/D Driver

• Medical Imaging Systems

• Related Literature

- AN9420, Current Feedback Theory

- AN9891, Single 5V Supply Operat io n

Pinouts

NC

-IN

+IN

V-

HFA1150

TOP VIEW

1
2
3
4

(SOIC)

­+

1

8

NC

7

V+

6

OUT

5

NC

1-888-INTERSIL or 321-724-7143

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

HFA1150

(SOT23)

TOP VIEW

OUT

1
2

V-

3

+IN

| Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000

+

-

V+

5

-IN

4

HFA1150

Absolute Maximum Ratings T

Voltage Between V+ and V-. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12V

Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V

Output Current (50% Duty Cycle) . . . . . . . . . . . . . . . . . . . . . . 60mA

ESD Rating

Human Body Model (Per MIL-STD-883 Method 3015.7). . . 600V

Operating Conditions

Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

= 25oC Thermal Information

A

Thermal Resistance (Typical, Note 1) θ

SUPPLY

SOIC Package . . . . . . . . . . . . . . . . . . . 175

SOT-23 Package . . . . . . . . . . . . . . . . . 225

Moisture Sensitivity (see Technical Brief TB363)

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1

SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1

Maximum Junction Temperature (Plastic Package). . . . . . . . .150

Maximum Storage Temperature Range. . . . . . . . . . -65

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300

(Lead Tips Only)

(oC/W)

JA

o

C to 150oC

o

o

NOTE:

is measured with the component mounted on an evaluation PC board in free air.

1. θ

JA

Electrical Specifications V

PARAMETER

= ±5V, AV = 1, RF = 510Ω, RL = 100Ω, Unless Otherwise Specified

SUPPLY

TEST

CONDITIONS

(NOTE 2)

TEST

LEVEL

TEMP.

HFA1150IB (SOIC) HFA1150IH (SOT-23)

o

(

C)

UNITSMIN TYP MAX MIN TYP MAX

INPUT CHARACTERISTICS

Input Offset Voltage (Note 3) A 25 - 2 6 - 2 6 mV

AFull--10--10mV

o

Input Offset Voltage Drift C Full - 10 - - 10 - µV/

CMRR ∆VCM = ±2V A 25 40 46 - 40 46 - dB

V

IO

C

AFull38--38--dB

PSRR ∆VS = ±1.25V A 25 45 50 - 45 50 - dB

V

IO

AFull42--42--dB

Non-Inverting Input Bias Current
(Note 3)

Drift C Full - 40 - - 40 - nA/oC

+I

BIAS

CMS ∆VCM = ±2V A 25 - 20 40 - 20 40 µA/V

+I

BIAS

+IN = 0V A 25 - 25 40 - 25 40 µA

AFull--65--65µA

AFull--50--50µA/V

Inverting Input Bias Current (Note 3) -IN = 0V A 25 - 12 50 - 12 50 µA

AFull--60--60µA

Drift C Full - 40 - - 40 - nA/oC

-I

BIAS

CMS ∆VCM = ±2V A 25 - 1 7 - 1 7 µA/V

-I

BIAS

AFull--10--10µA/V

PSS ∆VS = ±1.25V A 25 - 6 15 - 6 15 µA/V

-I

BIAS

AFull--27--27µA/V
Non-Inverting Input Resistance A 25 25 50 - 25 50 - kΩ
Inverting Input Resistance C 25 - 25 - - 25 - Ω
Input Capacitance (Either Input) B 25 - 2 - - 2 - pF
Input Common Mode Range C Full ±2.5 ±3.0 - ±2.5 ±3.0 - V
Input Noise Voltage (Note 3) 100kHz B 25 - 4.7 - - 4.7 - nV/√Hz
+Input Noise Current (Note 3) 100kHz B 25 - 20 - - 20 - pA/√Hz

-Input Noise Current (Note 3) 100kHz B 25 - 40 - - 40 - pA/√Hz

TRANSFER CHARACTERISTICS

Open Loop Transimpedance Gain (Note 3) B 25 - 450 - - 450 - kΩ
Minimum Stable Gain A Full 1 - - 1 - - V/V

C

C

2

HFA1150

Electrical Specifications V

PARAMETER

= ±5V, AV = 1, RF = 510Ω, RL = 100Ω, Unless Otherwise Specified (Continued)

SUPPLY

HFA1150IB (SOIC) HFA1150IH (SOT-23)

o

(

C)

TEST

CONDITIONS

(NOTE 2)

TEST

LEVEL

TEMP.

UNITSMIN TYP MAX MIN TYP MAX

AC CHARACTERISTICS AV = +2, (Note 4) Unless Otherwise Specified

-3dB Bandwidth
(V

= 0.2V

OUT

P-P

-3dB Bandwidth (V
Gain Flatness

(V

= 0.2V

OUT

P-P

, Note 3)

= 2V

OUT

, Note 3)

)A

P-P

= -1 B 25 - 650 - - 540 - MHz

A

V

A

= +1 B 25 - 600 - - 500 - MHz

V

= +2 B 25 - 700 - - 540 - MHz

A

V

= +2 B 25 - 375 - - 350 - MHz

V

To 25MHz B 25 - ±0.03 - - ±0.05 - dB
To 50MHz B 25 - ±0.04 - - ±0.08 - dB
To 100MHz B 25 - ±0.05 - - ±0.1 - dB

= +1 B 25 - 100 - - 90 - MHz

Full Power Bandwidth

= 5V

(V

OUT

OUTPUT CHARACTERISTICS A

P-P

, Note 3)

= +2, (Note 4) Unless Otherwise Specified

V

Output Voltage A

A

V

= +2 B 25 - 175 - - 160 - MHz

A

V

= -1 A 25 ±3.0 ±3.3 - ±3.0 ±3.3 - V

V

AFull±2.5 ±3.0 - ±2.5 ±3.0 - V
Output Current R

= 50Ω, AV = -1 A 25, 85 ±50 ±60 - ±50 ±60 - mA

L

A-40±35 ±50 - ±35 ±50 - mA
DC Closed Loop Output Impedance (Note 3) B 25 - 0.07 - - 0.07 - Ω
2nd Harmonic Distortion (Note 3) 5MHz, V

30MHz, V

3rd Harmonic Distortion (Note 3) 5MHz, V

30MHz, V
TRANSIENT CHARACTERISTICS A
Rise and Fall Times V
Overshoot V
Slew Rate (V

OUT

Settling Time (V

= 5V

OUT

)A

P-P

= 2V to 0V, Note 3) To 0.1% B 25 - 20 - - 30 - ns

= +2, (Note 4) Unless Otherwise Specified

V

= 0.5V

OUT

= 0.5V

OUT

= -1 B 25 - 2700 - - 2500 - V/µs

V

= +1 B 25 - 750 - - 700 - V/µs

A

V

= +2 B 25 - 1300 - - 1200 - V/µs

A

V

OUT

OUT

OUT

OUT

= 2V

= 2V

= 2V

= 2V

P-P
P-P

P-P

P-P

P-P

P-P

B25--67---67-dBc
B25--53---53-dBc
B 25 - <-100 - - <-100 - dBc
B25--76---76-dBc

B25-0.6--0.7-ns
B 25 - 12 - - 12 - %

To 0.05% B 25 - 33 - - 37 - ns

To 0.01% B 25 - 55 - - 60 - ns
Overdrive Recovery Time V
VIDEO CHARACTERISTICS A

= +2, (Note 4) Unless Otherwise Specified

V

Differential Gain NTSC, R

Differential Phase NTSC, R

= ±2V B 25 - 5 - - 5 - ns

IN

= 150Ω B 25 - 0.02 - - 0.02 - %

L

NTSC, R

NTSC, R

= 75Ω B 25 - 0.04 - - 0.04 - %

L

= 150Ω B 25 - 0.03 - - 0.03 - Degrees

L

= 75Ω B 25 - 0.06 - - 0.06 - Degrees

L

POWER SUPPLY CHARACTERISTICS

Power Supply Range Note 5 B Full ±2.25 - ±5.5 ±2.25 - ±5.5 V
Power Supply Current (Note 3) A Full - 12 16 - 12 16 mA

NOTES:

2. Test Level: A. Production Tested; B. Typical or Guaranteed Limit Based on Characterization; C. Design Typical for Information Only.

3. See Typical Performance Curves for more information.

4. The feedback resistor value depends on closed loop gain and package type. See the “Optimum Feedback Resistor” table in the Application
Information section for values used for characterization.

5. The minimum supply voltage entry is a typical value.

3

HFA1150

Application Information

Relevant Application Notes

The following Application Notes pertain to the HFA1150:

• AN9787 - An Intuitive Approach to Understanding
Current Feedback Amplifiers

• AN9420 - Current Feedback Amplifier Theory and
Applications

• AN9663-Converting from Voltage Feedback to Current
Feedback Amplifiers

• AN9891-Operating the HFA1150 from 5V Single
Supply

These publications may be obtained from Intersil’s web site
(http://www.intersil.com) or via our AnswerFAX system.

Performanc e Differences Between Packages

The HF A1150 is a high frequency current feedback amplifier .
As such, it is sensitive to parasitic capacitances which
influence the amplifier’s operation. The different parasitic
capacitances of the SOIC and SOT-23 packages yield
performance differences (notably bandwidth and bandwidth
related parameters) between the two devices - see Electrical
Specification tables for details.

Because of these performance differences, designers should
evaluate and breadboard with the same package style to be
used in production.

Note that some “Typical P erf ormance Curves” have separate
graphs for each package type. Graphs not labeled with a
specific package type are applicable to both packages.

Optimum Feedback Resistor

The enclosed frequency response graphs detail the
performance of the HFA1150 in various gains. Although the
bandwidth dependency on A
voltage feedback amplifier, there is an appreciable decrease
in bandwidth at higher gains. This decrease can be
minimized by taking advantage of the current feedback
amplifier’s unique relationship between bandwidth and R
All current feedback amplifiers require a feedback resistor,
even for unity gain applications, and the R
with the internal compensation capacitor, sets the dominant
pole of the frequency response. Thus, the amplifier’s
bandwidth is inversely proportional to R
optimized for a R
+2. Decreasing R

= 576Ω/499Ω (SOIC/SOT-23), at a gain of

F

decreases stability , resulting in excessiv e

F

peaking and overshoot (Note: Capacitive feedback causes
the same problems due to the feedback impedance
decrease at higher frequencies). At higher gains the
amplifier is more stable, so R
off of stability for bandwidth. The table below lists
recommended R

values for v arious gains, and the expected

F

bandwidth.

isn’t as severe as that of a

CL

, in conjunction

F

. The HFA1150 is

F

can be decreased in a trade-

F

.

F

OPTIMUM FEEDBACK RESISTOR

RF (Ω)

A

CL

-1 422/464 650/540

+1 383, (+R

+2 576/499 700/540
+5 348/422 480/400

+10 178/348 380/300

SOIC/SOT-23

= 226)/

S

549, (+R

= 100)

S

BANDWIDTH (MHz)

SOIC/SOT-23

600/500

5V Single Supply Operation

This amplifier operates at single supply voltages down to

4.5V. The dramatic supply current reduction at this operating
condition (refer also to Figure 25) makes this op amp an
even better choice for low power 5V systems. Refer to
Application Note AN9891 for further information.

Driving Capacitive Loads

Capacitive loads, such as an A/D input, or an improperly
terminated transmission line will degrade the amplifier’s
phase margin resulting in frequency response peaking and
possible oscillations. In most cases, the oscillation can be
avoided by placing a resistor (R
prior to the capacitance.

Figure 1 details starting points for the selection of this
resistor. The points on the curve indicate the R
combinations for the optimum bandwidth, stability, and
settling time, but experimental fine tuning is recommended.
Picking a point above or to the right of the curve yields an
overdamped response, while points below or left of the curve
indicate areas of underdamped performance.

R

and CL form a low pass network at the output, thus

S

limiting system bandwidth well below the amplifier bandwidth
of 700MHz/540MHz (SOIC/SOT-23, A
R

as CL increases (as illustrated by the curves), the

S

maximum bandwidth is obtained without sacrificing stability.
In spite of this, bandwidth still decreases as the load
capacitance increases. For example, at A
C

= 22pF, the SOIC bandwidth is 410MHz, but the

L

bandwidth drops to 110MHz at A
C

= 390pF.

L

) in series with the output

S

and CL

S

= +2). By decreasing

V

= +2, RS = 20Ω,

V

=+2, RS = 5Ω,

V

4

50

40

30

20

SOIC

10

SERIES OUTPUT RESISTANCE (Ω)

0

0 100 200 300 400

SOT-23

150 250 35050

LOAD CAPACITANCE (pF)

AV = +2

FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs

LOAD CAPACITANCE

PC Board Layout

The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board. The

use of low inductance components such as chip
resistors and ch ip cap acito r s is strongly recomm ended ,
while a solid ground plane is a must!

Attention should be given to decoupling the power supplies.
A large value (10µF) tantalum in parallel with a small value
chip (0.1µF) capacitor works well in most cases.

HFA1150

Evaluation Boards

The performance of the HFA1150IB (SOIC) may be
evaluated using the HFA11XX Evaluation Board and a SOIC
to DIP adaptor like the Aries Electronics Part Number
08-350000-10. The SOT-23 version can be evaluated using
the OPAMPSOT23EVAL board.

To order evaluation boards (part number HFA11XXEVAL or
OPAMPSOT23EVAL), please contact your local sales office.

The schematic and layout of the HFA11XXEVAL and
OPAMPSOT23EVAL boards are shown below.

511Ω511Ω

1

50Ω

IN

10µF

0.1µF

2
3
4

-5V

FIGURE 2. HFA11XXEVAL SCHEMATIC

HFA11XXEVAL TOP LAYOUT

V

H

8
7
6
5

GND

NC

50Ω

GND

OUT
NC

10µF0.1µF

+5V

Terminated microstrip signal lines are recommended at the
input and output of the device. Output capacitance, such as
that resulting from an improperly terminated transmission
line, will degrade the frequency response of the amplifier and
may cause oscillations. In most cases, the oscillation can be
avoided by placing a resistor in series with the output.

Care must also be taken to minimize the capacitance to ground
seen by the amplifier’s in v erting input. The larger this
capacitance, the worse the gain peaking, resulting in pulse
overshoot and ev entual instability. To reduce this capacitance,
remove the ground plane under traces connected to -IN and
keep these traces as short as possible.

Examples of good high frequency layouts are the evaluation
boards shown below.

1

+IN

V

V+

L

V-

GND

HFA11XXEVAL BOTTOM LAYOUT

5

HFA1150

OUT

-5V

+IN

10µF

49.9Ω

0.1µF

0Ω

0Ω

499Ω49.9Ω

10µF0.1µF

1
2
3

+

5

­4

499Ω

0Ω

+5V

GND

FIGURE 3. OPAMPSOT23EVAL SCHEMATIC OPAMPSOT23EVAL GND LAYOUT

Call 1-888-INTERSIL or 321-724-7 143

TM

OPAMPSOT23EVAL TOP LAYOUT OPAMPSOT23EVAL BOTTOM LAYOUT

Typical Performance Curves V

200

AV = +1

150

100

50

0

-50

-100

OUTPUT VOLTAGE (mV)

-150

-200

FIGURE 4. SMALL SIGNAL PULSE RESPONSE FIGURE 5. LARGE SIGNAL PULSE RESPONSE

TIME (5ns/DIV.)

= ±5V, RF = Value From the “Optimum Feedback Resistor” Table, TA = 25oC,

SUPPLY

= 100Ω, Unless Otherwise Specified

R

L

OUTPUT VOLTAGE (V)

2.0
AV = +1

1.5

1.0

0.5

0

-0.5

-1.0

-1.5

-2.0
TIME (5ns/DIV.)

6

HFA1150

Typical Performance Curves V

200

AV = +2

150

100

50

0

-50

-100

OUTPUT VOLTAGE (mV)

-150

-200

FIGURE 6. SMALL SIGNAL PULSE RESPONSE FIGURE 7. LARGE SIGNAL PULSE RESPONSE

200

150

100

TIME (5ns/DIV.)

AV = +10

= ±5V, RF = Value From the “Optimum Feedback Resistor” Table, TA = 25oC,

SUPPLY

= 100Ω, Unless Otherwise Specified (Continued)

R

L

2.0
AV = +2

1.5

1.0

0.5

0

-0.5

OUTPUT VOLTAGE (V)

-1.0

-1.5

-2.0

SOIC

2.0

1.5

1.0

AV = +10

TIME (5ns/DIV.)

SOIC

50

0

-50

-100

OUTPUT VOLTAGE (mV)

-150

-200

AV = +5

AV = +5

TIME (5ns/DIV.)

0.5

0

-0.5

OUTPUT VOLTAGE (V)

-1.0

-1.5

-2.0

AV = +5

TIME (5ns/DIV.)

FIGURE 8. SMALL SIGNAL PULSE RESPONSE FIGURE 9. LARGE SIGNAL PULSE RESPONSE

200

150

100

50

0

-50

-100

OUTPUT VOLTAGE (mV)

-150

-200

AV = +10

AV = +5

TIME (5ns/DIV.)

SOT-23

AV = +5

2.0

1.5

1.0

0.5

0

-0.5

OUTPUT VOLTAGE (V)

-1.0

-1.5

-2.0

AV = +10

AV = +5

TIME (5ns/DIV.)

AV = +5

SOT-23

AV = +5

FIGURE 10. SMALL SIGNAL PULSE RESPONSE FIGURE 11. LARGE SIGNAL PULSE RESPONSE

7

HFA1150

Typical Performance Curves V

V

200mV

OUT =

3

GAIN

0

-3

-6
PHASE

NORMALIZED GAIN (dB)

1 10 100 1000

FIGURE 12. FREQUENCY RESPONSE FIGURE 13. FREQUENCY RESPONSE

V

200mV

OUT =

0.1
0

-0.1

-0.2

-0.3

-0.4

-0.5

NORMALIZED GAIN (dB)

-0.6

-0.7

, SOIC

P-P

FREQUENCY (MHz)

, SOIC

P-P

AV = +1

AV = +1

AV = +1

AV = +2

= ±5V, RF = Value From the “Optimum Feedback Resistor” Table, TA = 25oC,

SUPPLY

= 100Ω, Unless Otherwise Specified (Continued)

R

L

V

200mV

OUT =

AV = +2

AV = +2

0
90
180
270
360

PHASE (DEGREES)

3

GAIN

0

-3

-6
PHASE

NORMALIZED GAIN (dB)

1 10 100 1000

V

OUT = 5VP-P

3
0

-3

-6

NORMALIZED GAIN (dB)

-9

, SOIC

P-P

FREQUENCY (MHz)

, SOIC

AV = +1

AV = +5

AV = +10

AV = +5

AV = +10

0
90
180
270
360

PHASE (DEGREES)

A

= +2

V

1 1000

FREQUENCY (MHz)

10010

FIGURE 14. GAIN FLATNESS FIGURE 15. FULL POWER BANDWIDTH

V

200mV

OUT =

3

GAIN

0

-3

-6
PHASE

NORMALIZED GAIN (dB)

1 10 100 1000

, SOT-23

P-P

FREQUENCY (MHz)

AV = +2

AV = +1

AV = +2

AV = +1

FIGURE 16. FREQUENCY RESPONSE FIGURE 17. FREQUENCY RESPONSE

0
90
180
270
360

PHASE (DEGREES)

1 10 100 1000

FREQUENCY (MHz)

V

200mV

OUT =

3

GAIN

0

-3

-6
PHASE

NORMALIZED GAIN (dB)

1 10 100 1000

, SOT-23

P-P

FREQUENCY (MHz)

AV = +5

AV = +10

AV = +5

AV = +10

0
90
180
270
360

PHASE (DEGREES)

8

HFA1150

Typical Performance Curves V

V

200mV

OUT =

0.4

0.3

0.2

0.1
0

-0.1

-0.2

NORMALIZED GAIN (dB)

-0.3

-0.4

1 1000

FIGURE 18. GAIN FLATNESS FIGURE 19. FULL POWER BANDWIDTH

630

63

, SOT-23

P-P

FREQUENCY (MHz)

GAIN

AV = +1

AV = +2

10010

= ±5V, RF = Value From the “Optimum Feedback Resistor” Table, TA = 25oC,

SUPPLY

= 100Ω, Unless Otherwise Specified (Continued)

R

L

V

OUT = 5VP-P

3
0

-3

-6

NORMALIZED GAIN (dB)

-9

1 10 100 1000

1000

100

, SOT-23

FREQUENCY (MHz)

AV = +1

A

= +2

V

6.3

GAIN (kΩ)

0.63

0.01 0.1 1 10 100 500

PHASE

FREQUENCY (MHz)

180
135
90
45
0

PHASE (DEGREES)

10

1

OUTPUT RESISTANCE (Ω)

0.1

0.3 1 10 100 1000
FREQUENCY (MHz)

FIGURE 20. OPEN LOOP TRANSIMPEDANCE FIGURE 21. CLOSED LOOP OUTPUT RESISTANCE

A

= +2

V

V

-0.025

SETTLING ERROR (%)

0.1

0.05

0.025

-0.05

-0.1

= 2V

OUT

SOIC

0

0.1

0.05

0.025
0

-0.025

-0.05

SETTLING ERROR (%)

-0.1

AV = +2
V

OUT

SOT-23

= 2V

10 80 10090

30 50 7020 40 60

TIME (ns)

10 80 10090

30 50 7020 40 60

TIME (ns)

FIGURE 22. SETTLING RESPONSE FIGURE 23. SETTLING RESPONSE

9

HFA1150

Typical Performance Curves V

10

8

6

4

NOISE VOLTAGE (nV/√Hz)

2

0

100 1K 10K 100K

FREQUENCY (Hz)

FIGURE 24. INPUT NOISE vs FREQUENCY FIGURE 25. SUPPLY CURRENT vs SUPPLY VOLTAGE

-30

-40

-50

100MHz

= ±5V, RF = Value From the “Optimum Feedback Resistor” Table, TA = 25oC,

SUPPLY

= 100Ω, Unless Otherwise Specified (Continued)

R

L

20

17.5

15

12.5
10

7.5
5

SUPPLY CURRENT (mA)

2.5
0

456789101112

-30

-40

-50

-60

E

I

NI

INI-

NI

+

50MHz

30MHz

200
180
160
140
120
100
80
60
40
20
0

)

NOISE CURRENT (pA/√Hz

TOTAL SUPPLY VOLTAGE (V+ - V-, V)

100MHz

50MHz

-60

DISTORTION (dBc)

-70

-80
0612

OUTPUT POWER (dBm)

FIGURE 26. 2nd HARMONIC DISTORTION vs P

5MHz

93-3-6

OUT

-70

-80

DISTORTION (dBc)

-90

-100
061293-3-6

OUTPUT POWER (dBm)

FIGURE 27. 3rd HARMONIC DISTORTION vs P

30MHz

5MHz

OUT

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Die Characteristics

HFA1150

DIE DIMENSIONS:

53 mils x 25mils
1350µm x 630µm

METALLIZATION:

Type: Metal 1: AlCu (2%)/TiW
Thickness: Metal 1: 8k

Å ±0.4kÅ

Type: Metal 2: AlCu (2%)
Thickness: Metal 2: 16kÅ ±0.8kÅ

Metallization Mask Layout

HFA1150

PASSIVATION:

Type: Nitride
Thickness: 4k

Å ±0.5kÅ

TRANSISTOR COUNT:

40

SUBSTRATE POTENTIAL (POWERED UP):

Floating (Recommend Connection to V-)

OUTV+

V-

+IN-IN

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.

Intersil semiconductor products are sold by de scription only. Intersi l Corporation reserves the right to mak e changes in circu it design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reli­able. However , no respon sibi lity i s assu med by Intersil or its subsidiaries f or its u se; nor for any infringements of pate nts o r oth er rights of thi rd parties which ma y resu lt f rom
its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site www.intersil.com

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