intersil HFA1112 DATA SHEET

®

HFA1112

Data Sheet July 27, 2005

850MHz, Low Distortion Programmable
Gain Buffer Amplifiers

The HFA1112 is a closed loop Buffer featuring user
programmable gain and ultra high speed performance.
Manufactured on Intersil’s proprietary complementary
bipolar UHF-1 process, these devices offer a wide -3dB
bandwidth of 850MHz, very fast slew rate, excellent gain
flatness, low distortion and high output current.

A unique feature of the pinout allows the user to select a
voltage gain of +1, -1, or +2, without the use of any external
components. Gain selection is accomplished via
connections to the inputs, as described in the “Application
Information” section. The result is a more flexible product,
fewer part types in inventory, and more efficient use of board
space.

Compatibility with existing op amp pinouts provides flexibility
to upgrade low gain amplifiers, while decreasing component
count. Unlike most buffers, the standard pinout provides an
upgrade path should a higher closed loop gain be needed at
a future date.

This amplifier is available with programmable output limiting
as the HF A1113. For applications requiring a standard buffer
pinout, please refer to the HFA1110 data sheet.

HFA1112 (PDIP, SOIC)

TOP VIEW

300

300

­+

8

NC

V+

7

6

OUT

NC

5

NC

-IN

+IN

1

2

3

V-

4

FN2992.8

Features

• User Programmable for Closed-Loop Gains of +1, -1 or +2
without Use of External Resistors

• Wide -3dB Bandwidth. . . . . . . . . . . . . . . . . . . . . . 850MHz

• Very Fast Slew Rate. . . . . . . . . . . . . . . . . . . . . . 2400V/µs

• Fast Settling Time (0.1%). . . . . . . . . . . . . . . . . . . . . 11ns

• High Output Current. . . . . . . . . . . . . . . . . . . . . . . . . 60mA

• Excellent Gain Accuracy . . . . . . . . . . . . . . . . . . . 0.99V/V

• Overdrive Recovery . . . . . . . . . . . . . . . . . . . . . . . . <10ns

• Standard Operational Amplifier Pinout

• Pb-Free Plus Anneal Available (RoHS Compliant)

Applications

• RF/IF Processors

• Driving Flash A/D Converters

• High-Speed Communications

• Impedance Transformation

• Line Driving

• Video Switching and Routing

• Radar Systems

• Medical Imaging Systems

• Related Literature

- AN9507, Video Cable Drivers Save Board Space

Related Literature

• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”

Pin Descriptions

NAME PIN NUMBER DESCRIPTION

NC 1, 5, 8 No Connection

-IN 2 Inverting Input
+IN 3 Non-Inverting Input

V- 4 Negative Supply

OUT 6 Output

V+ 7 Positive Supply

1

Ordering Information

PART NUMBER

(BRAND)

HFA1112IP -40 to 85 8 Ld PDIP E8.3
HFA1112IB

(1112IB)
HFA1112IB96

(1112IB)
HFA1112IBZ

(1112IBZ) (Note)
HFA1112IBZ96

(1112IBZ) (Note)
HFA11XXEVAL High Speed Op Amp DIP Evaluation Board

NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate termination finish,
which are RoHS compliant and compatible with both SnPb and Pb-free soldering
operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

Copyright Intersil Americas Inc. 2000 2004, 2005. All Rights Reserved

All other trademarks mentioned are the property of their respective owners.

TEMP.

RANGE (°C) PACKAGE

-40 to 85 8 Ld SOIC M8.15

8 Ld SOIC Tape and Reel M8.15

-40 to 85 8 Ld SOIC
(Pb-free)

8 Ld SOIC Tape and Reel
(Pb-free)

PKG.

DWG. #

M8.15

M8.15

HFA1112

Absolute Maximum Ratings Thermal Information

Voltage Between V+ and V-. . . . . . . . . . . . . . . . . . . . . . . . . . . . .12V

Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60mA

SUPPLY

Thermal Resistance (Typical, Note 1) θ

PDIP Package . . . . . . . . . . . . . . . . . . . 125 N/A

SOIC Package . . . . . . . . . . . . . . . . . . . 170 N/A

Maximum Junction Temperature (Plastic Package) . . . . . . . .150

Operating Conditions

Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specificat ion is not implied.

Maximum Storage Temperature Range. . . . . . . . . . -65

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300

(SOIC - Lead Tips Only)

NOTE:

is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

1. θ

JA

(oC/W) θJC (oC/W)

JA

o

C to 150oC

o

o

C

C

Electrical Specifications V

PARAMETER TEST CONDITIONS TEMP (

= ±5V, AV = +1, RL = 100Ω, Unless Otherwise Specified

SUPPLY

o

C) MIN TYP MAX UNITS

INPUT CHARACTERISTICS

Output Offset Voltage 25 - 8 25 mV

Full - - 35 mV
Output Offset Voltage Drift Full - 10 - µV/
PSRR 25 39 45 - dB

Full 35 - - dB
Input Noise Voltage (Note 3) 100kHz 25 - 9 - nV/√Hz
Non-Inv erting Input N o ise Cu rrent (Not e 3) 100kHz 25 - 37 - pA/√Hz
Non-Inverting Input Bias Current 25 - 25 40 µA

Full - - 65 µA
Non-Inverting Input Resistance 25 25 50 - kΩ
Inverting Input Resistance (Note 2) 25 240 300 360 Ω
Input Capacitance 25 - 2 - pF
Input Common Mode Range Full ±2.5 ±2.8 - V

TRANSFER CHARACTERISTICS

Gain A

= +1, VIN = +2V 25 0.980 0.990 1.02 V/V

V

Full 0.975 - 1.025 V/V
Gain A

= +2, VIN = +1V 25 1.96 1.98 2.04 V/V

V

Full 1.95 - 2.05 V/V
DC Non-Linearity (Note 3) A

= +2, ±2V Full Scale 25 - 0.02 - %

V

OUTPUT CHARACTERISTICS

Output Voltage (Note 3) A

= -1 25 ±3.0 ±3.3 - V

V

Full ±2.5 ±3.0 - V
Output Current (Note 3) R

= 50Ω 25, 85 50 60 - mA

L

-40 35 50 - mA

Closed Loop Output Impedance DC, A

= +2 25 - 0.3 - Ω

V

POWER SUPPLY CHARACTERISTICS

Supply Voltage Range Full ±4.5 - ±5.5 V
Supply Current (Note 3) 25 - 21 26 mA

Full - - 33 mA

AC CHARACTERISTICS

= -1 25 450 800 - MHz

-3dB Bandwidth

= 0.2V

(V

OUT

, Notes 2, 3)

P-P

A

V

A

= [phone] - MHz

V

= [phone] - MHz

A

V

o

C

2

HFA1112

Electrical Specifications V

PARAMETER TEST CONDITIONS TEMP (

Slew Rate
(V

= 5V

OUT

Full Power Bandwidth
(V

= 5V

OUT

Gain Flatness
(to 30MHz, Notes 2, 3)

Gain Flatness
(to 50MHz, Notes 2, 3)

Gain Flatness
(to 100MHz, Notes 2, 3)

Linear Phase Deviation
(to 100MHz, Note 3)

2nd Harmonic Distortion
(30MHz, V

3rd Harmonic Distortion
(30MHz, V

2nd Harmonic Distortion
(50MHz, V

3rd Harmonic Distortion
(50MHz, V

2nd Harmonic Distortion
(100MHz, V

3rd Harmonic Distortion
(100MHz, V

3rd Order Intercept
(A

= +2, Note 3)

V

1dB Compression

= +2, Note 3)

(A

V

Reverse Isolation

, Note 3)

(S

12

TRANSIENT CHARACTERISTICS

Rise Time

= 0.5V Step, Note 2)

(V

OUT

P-P

P-P

OUT

OUT

OUT

OUT

OUT

OUT

, Note 2)

, Note 3)

= 2V

P-P

= 2V

P-P

= 2V

P-P

= 2V

P-P

= 2V

= 2V

, Notes 2, 3)

, Notes 2, 3)

, Notes 2, 3)

, Notes 2, 3)

, Notes 2, 3)

P-P

, Notes 2, 3)

P-P

= ±5V, AV = +1, RL = 100Ω, Unless Otherwise Specified (Continued)

SUPPLY

o

C) MIN TYP MAX UNITS

= -1 25 1500 2400 - V/µs

A

V

= [phone] - V/µs

A

V

= [phone] - V/µs

A

V

= -1 25 - 300 - MHz

A

V

A

= +1 25 - 150 - MHz

V

= +2 25 - 220 - MHz

A

V

= -1 25 - ±0.02 - dB

A

V

= +1 25 - ±0.1 - dB

A

V

= +2 25 - ±0.015 ±0.04 dB

A

V

= -1 25 - ±0.05 - dB

A

V

= +1 25 - ±0.2 - dB

A

V

= +2 25 - ±0.036 ±0.08 dB

A

V

= -1 25 - ±0.10 - dB

A

V

= +2 25 - ±0.07 ±0.22 dB

A

V

= -1 25 - ±0.13 - Degrees

A

V

= +1 25 - ±0.83 - Degrees

A

V

= +2 25 - ±0.05 - Degrees

A

V

= -1 25 - -52 - dBc

A

V

= +1 25 - -57 - dBc

A

V

= +2 25 - -52 -45 dBc

A

V

= -1 25 - -71 - dBc

A

V

= +1 25 - -73 - dBc

A

V

= +2 25 - -72 -65 dBc

A

V

= -1 25 - -47 - dBc

A

V

= +1 25 - -53 - dBc

A

V

= +2 25 - -47 -40 dBc

A

V

= -1 25 - -63 - dBc

A

V

= +1 25 - -68 - dBc

A

V

= +2 25 - -65 -55 dBc

A

V

= -1 25 - -41 - dBc

A

V

A

= +1 25 - -50 - dBc

V

= +2 25 - -42 -35 dBc

A

V

= -1 25 - -55 - dBc

A

V

A

= +1 25 - -49 - dBc

V

= +2 25 - -62 -45 dBc

A

V

100MHz 25 - 28 - dBm
300MHz 25 - 13 - dBm
100MHz 25 - 19 - dBm
300MHz 25 - 12 - dBm
40MHz 25 - -70 - dB
100MHz 25 - -60 - dB
600MHz 25 - -32 - dB

= -1 25 - 500 800 ps

A

V

= +1 25 - 480 750 ps

A

V

A

= +2 25 - 700 1000 ps

V

3

HFA1112

Electrical Specifications V

PARAMETER TEST CONDITIONS TEMP (

Rise Time
(V

= 2V Step)

OUT

Overshoot
(V

= 0.5V Step, Input tR/tF = 200ps,

OUT

Notes 2, 3, 4)

0.1% Settling Time (Note 3) V

0.05% Settling Time V
Overdrive Recovery Time V
Differential Gain A

Differential Phase A

NOTES:

2. This parameter is not tested. The limits are guaranteed based on lab characterization, and reflect lot-to-lot variation.

3. See Typical Performance Curves for more information.

4. Overshoot decreases as input transition times increase, especially for A

Application Information

= ±5V, AV = +1, RL = 100Ω, Unless Otherwise Specified (Continued)

SUPPLY

o

C) MIN TYP MAX UNITS

= -1 25 - 0.82 - ns

A

V

= +1 25 - 1.06 - ns

A

V

= +2 25 - 1.00 - ns

A

V

A

= -1 25 - 12 30 %

V

A

= +1 25 - 45 65 %

V

= +2 25 - 6 20 %

A

V

= 2V to 0V 25 - 11 - ns

OUT

= 2V to 0V 25 - 15 - ns

OUT

= 5V

IN

P-P

= +1, 3.58MHz, RL = 150Ω 25 - 0.03 - %

V

= +2, 3.58MHz, RL = 150Ω 25 - 0.02 - %

A

V

= +1, 3.58MHz, RL = 150Ω 25 - 0.05 - Degrees

V

= +2, 3.58MHz, RL = 150Ω 25 - 0.04 - Degrees

A

V

25 - 8.5 - ns

= +1. Please refer to Typical Performance Curves.

V

Terminated microstrip signal lines are recommended at the
input and output of the device. Capacitance directly on the

Closed Loop Gain Selection

The HFA1112 features a novel design which allows the user
to select from three closed loop gains, without any external
components. The result is a more flexible product, fewer part
types in inventory, and more efficient use of board space.

This “buffer” operates in closed loop gains of -1, +1, or +2, and
gain selection is accomplished via connections to the ±inputs.
Applying the input signal to +IN and floating -IN selects a gain
of +1, while grounding -IN selects a gain of +2. A gain of -1 is
obtained by applying the input signal to -IN with +IN grounded.

The table below summarizes these connections:

output must be minimized, or isolated as discussed in the
next section.

For unity gain applications, care must also be taken to
minimize the capacitance to ground seen by the amplifier’s
inverting input. At higher frequencies this capacitance will
tend to short the -INPUT to GND, resulting in a closed loop
gain which increases with frequency. This will cause
excessive high frequency peaking and potentially other
problems as well.

An example of a good high frequency layout is the
Evaluation Board shown in Figure 2.

GAIN
(A

)

CL

-1 GND Input
+1 Input NC (Floating)
+2 Input GND

+INPUT (PIN 3) -INPUT (PIN 2)

CONNECTIONS

PC Board Layout

The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board. The

use of low inductance components such as chip
resistors and ch ip cap acito r s is strongly recomm ended ,
while a solid ground plane is a must!

Attention should be given to decoupling the power supplies.
A large value (10µF) tantalum in parallel with a small value
(0.1µF) chip capacitor works well in most cases.

4

Driving Capacitive Loads

Capacitive loads, such as an A/D input, or an improperly
terminated transmission line will degrade the amplifier’s
phase margin resulting in frequency response peaking and
possible oscillations. In most cases, the oscillation can be
avoided by placing a resistor (R
prior to the capacitance.

Figure 1 details starting points for the selection of this
resistor. The points on the curve indicate the R
combinations for the optimum bandwidth, stability, and
settling time, but experimental fine tuning is recommended.
Picking a point above or to the right of the curve yields an
overdamped response, while points below or left of the curve
indicate areas of underdamped performance.

R

and CL form a low pass network at the output, thus

S

limiting system bandwidth well below the amplifier
bandwidth of 850MHz. By decreasing R

) in series with the output

S

and CL

S

as CLincreases

S

HFA1112

(as illustrated in the curves), the maximum bandwidth is
obtained without sacrificing stability. Even so, bandwidth
does decrease as you move to the right along the curve.
For example , at A

= +1, RS = 50Ω, CL = 30pF, the overall

V

bandwidth is limited to 300MHz, and bandwidth drops to
100MHz at A

50
45
40
35
30

(Ω)

25

S

20

R

15
10

5
0

FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs

IN

10µF

= +1, RS = 5Ω, CL = 340pF.

V

AV = +1

AV = +2

0 40 80 120 160 200 240 280 320 360 400

LOAD CAPACITANCE (pF)

LOAD CAPACITANCE

∞ (AV = +1)

or 0Ω (A

R

0.1µF

1

50Ω

= +2)

V

-5V

V

H

1
2
3
4

GND

8
7

50Ω

6
5

GND

OUT
V

L

10µF0.1µF

+5V

Evaluation Board

The performance of the HFA1112 may be evaluated using
the HFA11XX Evaluation Board, slightly modified as follows:

1. Remo ve the 500Ω f eedbac k resistor (R
connection open.

2. a. F or AV = +1 evaluation, remove the 500Ω gain setting

resistor (R1), and leave pin 2 floating.

b. For A

= +2, replace the 500Ω gain setting resistor with

V

a 0Ω resistor to GND.

The layout and modified schematic of the board are shown in
Figure 2.

To order evaluation boards (part number HFA11XXEVAL),
please contact your local sales office.

TOP LAYOUT BOTTOM LAYOUT

V

H

1

+IN

OUT

V+

V

L

V-

GND

), and leav e the

2

FIGURE 2. EVALUATION BOARD SCHEMATIC AND LAYOUT

5