Intersil Corporation HFA1110 Datasheet

HFA1110

Data Sheet February 1999 File Number 2944.7

750MHz, Low Distortion Unity Gain,
Closed Loop Buffer

The HFA1110 is a unity gain closed loop bufferthatachieves

-3dB bandwidth of 750MHz, while offering excellent video
performance and low distortion. Manufactured on Intersil’s
proprietary complementary bipolar UHF-1 process, the
HFA1110 also offers very fast slew rate, and high output
current. It is one more example of Intersil’s intent to enhance
its leadership position in products for high speed signal
processing applications.

The HFA1110’s settling time of 11ns to 0.1%, low distortion
and ability to drive capacitive loads make it an ideal flash
A/D driver.

The HFA1110 is an enhanced, pin compatible upgrade for
the AD9620, AD9630, CLC110, EL2072, BUF600 and
BUF601.

For buffer applications requiring a standard op amp pinout,
or selectable gain (-1, +1, +2), see the HFA1112 data sheet.
For output limiting see the HFA1113 data sheet.

For military grade product please refer to the HFA1110/883
data sheet.

Pinout

HFA1110

(SOIC)

TOP VIEW

V+

OPT V+

NC

1

2

3

4

IN

-

8

OUT

NC

7

+

OPT V-

6

5

V-

Features

• Wide -3dB Bandwidth. . . . . . . . . . . . . . . . . . . . . .750MHz

• Very Fast Slew Rate. . . . . . . . . . . . . . . . . . . . . . 1300V/µs

• Fast Settling Time (0.2%). . . . . . . . . . . . . . . . . . . . . . 7ns

• High Output Current. . . . . . . . . . . . . . . . . . . . . . . . .60mA

• Fixed Gain of +1

• Gain Flatness (100MHz) . . . . . . . . . . . . . . . . . . . . 0.03dB

• Differential Phase. . . . . . . . . . . . . . . . . . . 0.025 Degrees

• Differential Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.04%

• 3rd Harmonic Distortion (50MHz). . . . . . . . . . . . . . -80dBc

• 3rd Order Intercept (100MHz) . . . . . . . . . . . . . . . . 30dBm

Applications

• Video Switching and Routing

• RF/IF Processors

• Driving Flash A/D Converters

• High-Speed Communications

• Impedance Transformation

• Line Driving

• Radar Systems

Ordering Information

PART NUMBER

(BRAND)

HFA1110IB
(H1110I)

HFA1110EVAL High Speed Buffer DIP Evaluation Board

TEMP.

RANGE (oC) PACKAGE

-40 to 85 8 Ld SOIC M8.15

PKG.

NO.

Pin Descriptions

PIN

NAME

V+ 1 Positive Supply

Opt V+ 2 Optional Positive Supply

NC 3 No Connection

IN 4 Input
V- 5 Negative Supply

Opt V- 6 Optional Negative Supply

NC 7 No Connection

OUT 8 Output

NUMBER DESCRIPTION

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143

| Copyright © Intersil Corporation 1999

HFA1110

Absolute Maximum Ratings Thermal Information

Voltage Between V+ and V-. . . . . . . . . . . . . . . . . . . . . . . . . . . . .12V

DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

SUPPLY

Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60mA

Operating Conditions

Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. θJA is measured with the component mounted on an evaluation PC board in free air.

Thermal Resistance (Typical, Note 1) θJA (oC/W)

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158

Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC

Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC

(SOIC - Lead Tips Only)

Electrical Specifications V

PARAMETER TEST CONDITIONS TEMP (

= ±5V, RL = 100Ω, Unless Otherwise Specified

SUPPLY

o

C) MIN TYP MAX UNITS

INPUT CHARACTERISTICS

Output Offset Voltage (Note 2) 25 - 8 25 mV

Full - - 35 mV
Output Offset Voltage Drift Full - 10 - µV/oC
PSRR 25 39 45 - dB

Full 35 - - dB
Input Noise Voltage (Note 2) 100kHz 25 - 14 - nV/√Hz
Input Noise Current (Note 2) 100kHz 25 - 51 - pA/√Hz
Input Bias Current (Note 2) 25 - 10 40 µA

Full - - 65 µA
Input Resistance 25 25 50 - kΩ
Input Capacitance 25 - 2 - pF

TRANSFER CHARACTERISTICS

Gain V

OUT

= 2V

P-P

25 0.980 0.990 1.02 V/V

Full 0.975 - 1.025 V/V
DC Non-Linearity (Note 2) ±2V Full Scale 25 - 0.003 - %

OUTPUT CHARACTERISTICS

Output Voltage (Note 2) 25 3.0 3.3 - ±V

Full 2.5 3.0 - ±V
Output Current (Note 2) RL = 50Ω 25, 85 50 60 - mA

-40 35 50 - mA

POWER SUPPLY CHARACTERISTICS

Supply Voltage Range Full 4.5 - 5.5 ±V
Supply Current (Note 2) 25 - 21 26 mA

Full - - 33 mA

AC CHARACTERISTICS

-3dB Bandwidth (Note 2) V
Slew Rate V
Full Power Bandwidth (Note 2) V

OUT
OUT
OUT

= 0.2V
= 5V
= 4V

P-P
P-P

P-P

25 - 750 - MHz
25 - 1300 - V/µs
25 - 150 - MHz

Gain Flatness (Note 2) To 100MHz 25 - ±0.03 - dB

To 30MHz 25 - ±0.01 - dB
Linear Phase Deviation (Note 2) DC to 100MHz 25 - ±0.3 - Degrees
2nd Harmonic Distortion (Note 2) 50MHz, V
3rd Harmonic Distortion (Note 2) 50MHz, V

OUT
OUT

= 2V
= 2V

P-P
P-P

25 - -60 - dBc
25 - -80 - dBc

3rd Order Intercept (Note 2) 100MHz 25 - 30 - dBm

2

HFA1110

Electrical Specifications V

PARAMETER TEST CONDITIONS TEMP (oC) MIN TYP MAX UNITS

-1dB Gain Compression 100MHz 25 - 14 - dBm
Reverse Gain (S12, Note 2) 100MHz, V

TRANSIENT RESPONSE

Rise Time V
Overshoot (Note 2) V

0.2% Settling Time (Note 2) V

0.1% Settling Time (Note 2) V
Overdrive Recovery Time 25 - 15 - ns
Differential Gain 3.58MHz, RL = 75Ω 25 - 0.04 - %
Differential Phase 3.58MHz, RL = 75Ω 25 - 0.025 - Degrees

NOTE:

2. See Typical Performance Curves for more information.

Application Information

PC Board Layout

The frequency performance of this amplifier depends a great
deal on the amount of care taken in designing the PC board.

The use of low inductance components such as chip
resistors and chip capacitors is strongly recommended,

= ±5V, RL = 100Ω, Unless Otherwise Specified (Continued)

SUPPLY

= 1V

OUT

= 0.5V Step 25 - 0.5 - ns

OUT

= 1.0V Step, Input Signal

OUT

Rise/Fall = 1ns

= 1V to 0V 25 - 7 - ns

OUT

= 1V to 0V 25 - 11 - ns

OUT

P-P

25 - -60 - dB

25 - 2.5 - %

+5V

0.1µF10µF

IN

50Ω

1
2
3
4

HFA1110

8
7
6
5

50Ω

R

S

0.1µF10µF

while a solid ground plane is a must!

Attention should be given to decoupling the power supplies.

SCHEMATIC DIAGRAM

A large value (10µF) tantalum in parallel with a small value
chip (0.1µF) capacitor works well in most cases.

BOTTOM LAYOUT

OUT

-5V

Terminated microstrip signal lines are recommended at the
input and output of the device. Output capacitance, such as
that resulting from an improperly terminated transmission
line will degrade the frequency response of the amplifier and
may cause oscillations. In most cases, the oscillation can be
avoided by placing a resistor (R
See the “Recommended R

) in series with the output.

S

vs Load Capacitance” graph for

S

specific recommendations.
An example of a good high frequency layout is the

Evaluation Board shown below.

Evaluation Board

An evaluation board is available for the HFA1110 (part
number HFA1110EVAL). Please contact your local sales
office for information.

The layout and schematic of the board are shown here:

NOTE: The SOIC version may be evaluated in the DIP board by
using a SOIC-to-DIP adapter such as Aries Electronics Part Number
08-350000-10.

TOP LAYOUT

1

3