HD-6409/883
March 1997
Features
• This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
• Converter or Repeater Mode
• Independent Manchester Encoder and Decoder
Operation
• Static to One Megabit/Sec Data Rate Guaranteed
• Low Bit Error Rate
• Digital PLL Clock Recovery
• On Chip Oscillator
• Low Operating Power: 50mW Typical at +5V
• Available in 20 Lead Dual-In-Line and 20 Pad LCC
Package
Ordering Information
TEMPERATURE
PART NUMBER
HD1-6409/883 -55oC to +125oC CERDIP F20.3
HD4-6409/883 -55oC to +125oC CLCC J20.A
RANGE PACKAGE
PKG.
NO.
CMOS Manchester Encoder-Decoder
Description
The HD-6409/883 Manchester Encoder-Decoder (MED) is a
high speed, low power device manufactured using selfaligned silicon gate technology. The device is intended for
use in serial data communication, and can be operated in
either of two modes. In the converter mode, the MED converts Nonreturn-to-Zero code (NRZ) into Manchester code
and decodes Manchester code into Nonreturn-to-Zero code.
For serial data communication, Manchester code does not
have some of the deficiencies inherent in Nonreturn-to-Zero
code. For instance, use of the MED on a serial line eliminates DC components, provides clock recovery, and gives a
relatively high degree of noise immunity. Because the MED
converts the most commonly used code (NRZ) to Manchester code, the advantages of using Manchester code are easily realized in a serial data link.
In the Repeater mode, the MED accepts Manchester code
input and reconstructs it with a recovered clock. This minimizes the effects of noise on a serial data link. A digital
phase lock loop generates the recovered clock. A maximum
data rate of 1MHz requires only 50mW of power.
Manchester code is used in magnetic tape recording and in
fiber optic communication, and generally is used where data
accuracy is imperative. Because it frames blocks of data, the
HD-6409/883 easily interfaces to protocol controllers.
Pinouts
HD1-6409/883 (CERDIP)
TOP VIEW
1
BZI
BOI
2
UDI
3
SD/CDS
SDO
SRST
NVM
DCLK
RST
GND
4
5
6
7
8
9
10
HD4-6409/883 (CLCC)
TOP VIEW
UDI
BOI
BZI
VCC
VCC
20
BOO
19
BZO
18
SS
17
ECLK
16
CTS
15
MS
14
OX
13
12
IX
11
CO
SD/CDS
SDO
SRST
NVM
DCLK
3212019
4
5
6
7
8
10 11 12 139
GND
CO
RST
BOO
BZO
18
SS
17
ECLK
16
CTS
15
MS
14
IX
OX
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
| Copyright © Intersil Corporation 1999
5-135
File Number 2959.1
HD-6409/883
Absolute Maximum Ratings Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+7.0V
Input, Output or I/O Voltage Applied. . . . . GND -0.5V to VCC +0.5V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Operating Conditions
Operating Temperature Range. . . . . . . . . . . . . . . . -55oC to +125oC
Operating Voltage Range. . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times. . . . . . . . . . . . . . . . . . . . . . . . . .50ns Max
Sync. Transition Span (t2) . . . . . . . . . 1.5 DBP Typical, (Notes 1, 2)
Short Data Transition Span (t4) . . . . . 0.5 DBP Typical, (Notes 1, 2)
Long Data Transition Span (t5). . . . . . 1.0 DBP Typical, (Notes 1, 2)
Zero Crossing Tolerance (tCD5). . . . . . . . . . . . . . . . . . . . . . (Note 3)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. DBP - Data Bit Period. Clock Rate = 16X, one DBP = 16 Clock Cycles; Clock Rate = 32X; one DBP = 32 Clock Cycles.
2. The input conditions specified are nominal values, the actual input waveforms transition spans may vary by ±2 IX clock cycles (16X mode)
or ±6 IX clock cycles (32X mode).
3. The maximum zero crossing tolerance is ±2 IX clock cycles (16X mode) or ±6 IX clock cycles (32X mode) from the nominal.
TABLE 1. HD-6409/883 DC ELECTRICAL PERFORMANCE SPECIFICATIONS
Device Guaranteed and 100% Tested
PARAMETER SYMBOL CONDITIONS
Thermal Resistance θJA (oC/W) θJC (oC/W)
CERDIP Package . . . . . . . . . . . . . . . . 83 23
CLCC Package . . . . . . . . . . . . . . . . . . 95 26
Storage Temperature Range. . . . . . . . . . . . . . . . . .-65oC to +150oC
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +175oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300oC
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .250 Gates
LIMITS
GROUP A
SUBGROUPS TEMPERATURE
UNITSMIN MAX
Logic “1” Input Voltage VIH VCC = 4.5V 1, 2, 3 -55oC ≤ TA≤ +125oC 70%
VCC
Logic “0” Input voltage VIL VCC = 4.5V 1, 2, 3 -55oC ≤ TA≤ +125oC - 20% VCC V
Logic “1” Input Voltage
(RST)
Logic “0” Input Voltage
(RST)
Logic “1” Input Voltage (IX) VIHC VCC = 5.5V 1, 2, 3 -55oC ≤ TA≤ +125oC VCC -0.5 - V
Logic “0” Input Voltage (IX) VlLC VCC = 4.5V 1, 2, 3 -55oC ≤ TA≤ +125oC - GND +0.5 V
Input Leakage Current
(Except IX)
Input Leakage Current (IX) II VlN = VCC or
I/O Leakage Current IO VOUT = VCC
Output HIGH Voltage
(All except OX)
Output LOW Voltage
(All except OX)
VIHR VCC = 5.5V 1, 2, 3 -55oC ≤ TA≤ +125oC VCC -0.5 - V
VILR VCC = 4.5V 1, 2, 3 -55oC ≤ TA≤ +125oC - GND +0.5 V
II VIN = VCC or
GND
VCC = 5.5V
GND
VCC = 5.5V
or GND
VCC = 5.5V
VOH IOH = -2.0mA
VCC = 4.5V
(Note 1)
VOL IOL = +2.0mA
VCC = 4.5V
(Note 1)
1, 2, 3 -55oC ≤ TA≤ +125oC -1.0 +1.0 µA
1, 2, 3 -55oC ≤ TA≤ +125oC -20 +20 µA
1, 2, 3 -55oC ≤ TA≤ +125oC -10 +10 µA
1, 2, 3 -55oC ≤ TA≤ +125oC VCC -0.4 - V
1, 2, 3 -55oC ≤ TA≤ +125oC - 0.4 V
-V
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