Intersil Corporation HCTS93MS Datasheet
August 1995
HCTS93MS
Radiation Hardened
4-Bit Binary Ripple Counter
FeaturesIntersil
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
2
• SEP Effective LET No Upsets: >100 MEV-cm
• Single Event Upset (SEU) Immunity < 2 x 10
/mg
-9
Errors/
Bit-Day (Typ)
• Dose Rate Survivability: >1 x 10
10
• Dose Rate Upset >10
RAD (Si)/s 20ns Pulse
12
RAD (Si)/s
• Latch-Up Free Under Any Conditions
o
• Military Temperature Range: -55
C to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
Description
The Intersil HCTS93MS is a Radiation Hardened 4-bit binary
ripple counter consisting of four master-slave flip-flops
internally connected to provide a divide-by-two and a divideby-eight section. Each section has a separate clock input.
The HCTS93MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
Pinouts
CP1
MR1
MR2
NC
VCC
NC
NC
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T14
TOP VIEW
CP1
1
2
MR1
3
MR2
4
NC
5
VCC
6
NC
7
NC
14 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP3-F14
TOP VIEW
1
2
3
4
5
6
7
CP0
14
13
NC
12
Q0
11
Q3
10
GND
9
Q1
8
Q2
14
13
12
11
10
9
8
CP0
NC
Q0
Q3
GND
Q1
Q2
Ordering Information
PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE
HCTS93DMSR -55oC to +125oC Intersil Class S Equivalent 14 Lead SBDIP
HCTS93KMSR -55oC to +125oC Intersil Class S Equivalent 14 Lead Ceramic Flatpack
HCTS93D/Sample +25oC Sample 14 Lead SBDIP
HCTS93K/Sample +25oC Sample 14 Lead Ceramic Flatpack
HCTS93HMSR +25oC Die Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
480
Spec Number
File Number 3060.1
DB NA
518622
Functional Diagram
HCTS93MS
14
CP0
2
MR1
MR2
3
1
CP1
VCC = 5
GND = 10
TRUTH TABLE
OUTPUTS
COUNT
Q0 Q1 Q2 Q3
0LLLL
1HLLL
2LHLL
3HHLL
12
÷2
COUNTER
÷8
COUNTER
Q0
9
Q1
8
Q2
11
Q3
2
2 OUTPUTS
MR1 MR2 Q0 Q1 Q2 Q3
HHLLLL
L H Count
H L Count
L L Count
4LLHL
NOTE: H = HIGH Voltage Level, L = LOW Voltage Level,
5HLHL
6LHHL
7HHHL
8LLLH
9HLLH
10 L H L H
11 H H L H
12 L L H H
13 H L H H
14LHHH
15HHHH
Q0 Connected to CP0
481
Spec Number 518622
Specifications HCTS93MS
Absolute Maximum Ratings Reliability Information
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation.
Operating Conditions
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC
Input Rise and Fall Times at VCC = 4.5V (TR, TF) . . . 100ns/V Max
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
Thermal Resistance θ
SBDIP Package. . . . . . . . . . . . . . . . . . . . 74oC/W 24oC/W
Ceramic Flatpack Package . . . . . . . . . . . 116oC/W 30oC/W
Maximum Package Power Dissipation at +125oC Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.68W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.43W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13.5mW/oC
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . .8.6mW/oC
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V
Input High Voltage (VIH). . . . . . . . . . . . . . . . . . . . . . .VCC/2 to VCC
JA
θ
JC
(NOTE 1)
PARAMETER SYMBOL
Quiescent Current ICC VCC = 5.5V,
Output Current
(Sink)
Output Current
(Source)
Output Voltage Low VOL VCC = 4.5V, VIH = 2.25V,
Output Voltage High VOH VCC = 4.5V, VIH = 2.25V,
Input Leakage
Current
IOL VCC = 4.5V, VIH = 4.5V,
IOH VCC = 4.5V, VIH = 4.5V,
IIN VCC = 5.5V, VIN = VCC or
CONDITIONS
VIN = VCC or GND
VOUT = 0.4V, VIL = 0V
VOUT = VCC - 0.4V,
VIL = 0V
IOL = 50µA, VIL = 0.8V
VCC = 5.5V, VIH = 2.75V,
IOL = 50µA, VIL = 0.8V
IOH = -50µA, VIL = 0.8V
VCC = 5.5V, VIH = 2.75V,
IOH = -50µA, VIL = 0.8V
GND
GROUP
A SUB-
GROUPS TEMPERATURE
1 +25oC-20µA
2, 3 +125oC, -55oC - 400 µA
1 +25oC 4.8 - mA
2, 3 +125oC, -55oC 4.0 - mA
1 +25oC -4.8 - mA
2, 3 +125oC, -55oC -4.0 - mA
1, 2, 3 +25oC, +125oC, -55oC - 0.1 V
1, 2, 3 +25oC, +125oC, -55oC - 0.1 V
1, 2, 3 +25oC, +125oC, -55oC VCC
1, 2, 3 +25oC, +125oC, -55oC VCC
1 +25oC-±0.5 µA
2, 3 +125oC, -55oC-±5.0 µA
LIMITS
-V
-0.1
-V
-0.1
UNITSMIN MAX
Noise Immunity
Functional Test
NOTES:
1. All voltages referenced to device GND.
2. For functional tests, VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
FN VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V (Note 2)
7, 8A, 8B +25oC, +125oC, -55oC---
482
Spec Number 518622
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