Intersil Corporation HCTS74T Datasheet

HCTS74T

Data Sheet July 1999 File Number

Radiation Hardened Dual-D Flip-Flop with
Set and Reset

Intersil’sSatellite Applications FlowTM(SAF) devices are fully
tested and guaranteed to 100kRAD total dose. These QML
Class T devices are processed to a standard flow intended
to meet the cost and shorter lead-time needs of large
volume satellite manufacturers, while maintaining a high
level of reliability.

The Intersil HCTS74T is a RadiationHardened positiveedge
triggered flip-flop with set and reset.

Specifications

Specifications for Rad Hard QML devices are controlled by
the Defense Supply Center in Columbus (DSCC). The SMD
numbers listed below must be used when ordering.

Detailed Electrical Specifications for the HCTS74T are
contained in SMD 5962-95763. A “hot-link” is provided from

our website for downloading.

www.intersil.com/spacedefense/ne wsafc lasst.asp

Intersil’s Quality Management Plan (QM Plan), listing all
Class T screening operations, is also available on our
website.

www.intersil.com/quality/manuals.asp

Ordering Information

TEMP.

ORDERING

NUMBER

5962R9576301TCC HCTS74DTR -55 to 125

PART

NUMBER

RANGE

(oC)

4625.1

Features

• QML Class T, Per MIL-PRF-38535

• Radiation Performance

5

- Gamma Dose (γ) 1 x 10

RAD(Si)

- Latch-Up Free Under Any Conditions

- SEP Effective LET No Upsets: >100 MEV-cm

- Single Event Upset (SEU) Immunity < 2 x 10

2

/mg

-9

Errors/Bit-Day (Typ)

• 3 Micron Radiation Hardened SOS CMOS

• Significant Power Reduction Compared to LSTTL ICs

• DC Operating Voltage Range: 4.5V to 5.5V

• LSTTL Input Compatibility

-VIL = 0.8V Max

-V

= V

IH

• Input Current Levels Ii ≤ 5mA at V

CC/2

Min

OL

, V

OH

Pinouts

HCTS74T (SBDIP), CDIP2-T14

TOP VIEW

R1
D1

CP1

S1
Q1
Q1

GND

1
2
3
4
5
6
7

V

14

CC

R2

13
12

D2

11

CP2
S2

10

Q2

9

Q2

8

5962R9576301TXC HCTS74KTR -55 to 125

NOTE:

Minimumorderquantity for -T is 150 units through

distribution, or 450 units direct.

4-1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

HCTS74T (FLATPACK), CDFP3-F14

TOP VIEW

1R1

D1

CP1

S1
Q1
Q1

GND

www.intersil.com or 407-727-9207

Satellite Applications Flow™ (SAF) is a trademark of Intersil Corporation.

2
3
4
5
6
7

14
13

12
11
10

9
8

| Copyright © Intersil Corporation 1999

V

CC

R2
D2
CP2
S2
Q2
Q2

Functional Diagram

S

4(10)

D

2(12)

R

CL

CL

HCTS74T

CL

P
N

CL

CL

CL

P
N

CL

P
N

CL

Q

6(8)

P
N

1(13)
CP

3(11)

CL CL

Q

5(9)

TRUTH TABLE

INPUTS OUTPUTS

SET RESET CP D Q Q

LHXXHL

HLXXLH

LLXXH† H†

HH HHL
HH LLH
HHLXQ0Q0

NOTE: L = Logic Level Low, H = Logic Level High, X = Don’t Care

= Transition from Low to High Level.

Q0 = The level of Q before the indicated input conditions were established.

† This configuration is non-stable, that is, it will not persist when set and reset

inputs return to their inactive (High) level.

4-2