Intersil Corporation HCTS541MS Datasheet

August 1995

HCTS541MS

Radiation Hardened Non-Inverting

Octal Buffer/Line Driver, Three-State

Features

• 3 Micron Radiation Hardened CMOS SOS

• Total Dose 200K RAD (Si)

• SEP Effective LET No Upsets: >100 MEV-cm

• Single Event Upset (SEU) Immunity < 2 x 10 Bit-Day (Typ)

• Dose Rate Survivability: >1 x 10

• Dose Rate Upset >10

RAD (Si)/s 20ns Pulse

RAD (Si)/s

• Latch-Up Free Under Any Conditions

• Fanout (Over Temperature Range)

- Bus Driver Outputs - 15 LSTTL Loads

• Military Temperature Range: -55

C to +125oC

• Signiﬁcant Power Reduction Compared to LSTTL ICs

• DC Operating Voltage Range: 4.5V to 5.5V

• LSTTL Input Compatibility

- VIL = 0.8V Max

- VIH = VCC/2 Min

• Input Current Levels Ii ≤ 5µA at VOL, VOH

/mg

-9

Errors/

Pinouts

20 LEAD CERAMIC DUAL-IN-LINE

METAL SEAL PACKAGE (SBDIP)

MIL-STD-1835 CDIP2-T20

TOP VIEW

OE1

7 8

GND

20 LEAD CERAMIC METAL SEAL

FLATPACK PACKAGE (FLATPACK)

MIL-STD-1835 CDFP4-F20

TOP VIEW

VCC

OE2

13 12

Description

The Intersil HCTS541MS is a Radiation Hardened noninverting octal buffer/line driver, three-state outputs. The output enable pins (OEN1 and OEN2) control the three-state outputs. If either enable is high the outputs will be in the high impedance state. For data output both enables (OEN1 and OEN2) must be low.

The HCTS541MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of

OE1

A0 A1 A2 A3 A4 A5 A6 A7

GND

120 2 3 4 5 6 7 8 9 10

19 18 17 16 15 14 13 12 11

radiation hardened, high-speed, CMOS/SOS Logic Family. The HCTS54 is supplied in a 20 lead Ceramic ﬂatpack

(K sufﬁx) or a SBDIP Package (D sufﬁx).

Ordering Information

PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE

HCTS541DMSR -55oC to +125oC Intersil Class S Equivalent 20 Lead SBDIP

HCTS541KMSR -55oC to +125oC Intersil Class S Equivalent 20 Lead Ceramic Flatpack

HCTS541D/Sample +25oC Sample 20 Lead SBDIP

HCTS541K/Sample +25oC Sample 20 Lead Ceramic Flatpack

VCC OE2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7

HCTS541HMSR +25oC Die Die

682

Spec Number

518630

File Number 3073.1

Functional Block Diagram

TTL

HCTS541MS

VDD

TTL

VDD

TTL

TRUTH TABLE

INPUTS

OUTPUTSOE1 OE2 An

LLHH HXXZ XHXZ

LLLL

H = High Voltage Level, L = Low Voltage Level, X = Immaterial, Z = High Impedance

683

Spec Number 518630

Speciﬁcations HCTS541MS

Absolute Maximum Ratings Reliability Information

Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to +7.0V

Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V

DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA

DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .±25mA

(All Voltage Reference to the VSS Terminal)

Storage Temperature Range (TSTG). . . . . . . . . . . -65oC to +150oC

Lead Temperature (Soldering 10sec). . . . . . . . . . . . . . . . . . +265oC

Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC

ESD Classiﬁcation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1

CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation.

Operating Conditions

Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V

Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC

Input Rise and Fall Times at 4.5V VCC (TR, TF). . . . . . .500ns Max

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS

Thermal Resistance θ

SBDIP Package. . . . . . . . . . . . . . . . . . . . 72oC/W 24oC/W

Ceramic Flatpack Package . . . . . . . . . . . 107oC/W 28oC/W

Maximum Package Power Dissipation at +125oC Ambient

SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.69W

Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.47W

If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate:

SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13.9mW/oC

Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . .9.3mW/oC

Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V

Input High Voltage (VIH). . . . . . . . . . . . . . . . . . . . . . .VCC/2 to VCC

(NOTE 1)

PARAMETER SYMBOL

Quiescent Current ICC VCC = 5.5V,

Output Current (Sink)

Output Current (Source)

Output Voltage Low VOL VCC = 4.5V, VIH = 2.25V,

Output Voltage High VOH VCC = 4.5V, VIH = 2.25V,

Input Leakage Current

IOL VCC = 4.5V, VIH = 4.5V,

IOH VCC = 4.5V, VIH = 4.5V,

IIN VCC = 5.5V, VIN = VCC or

CONDITIONS

VIN = VCC or GND

VOUT = 0.4V, VIL = 0V

VOUT = VCC - 0.4V, VIL = 0V

IOL = 50µA, VIL = 0.8V

VCC = 5.5V, VIH = 2.75V, IOL = 50µA, VIL = 0.8V

IOH = -50µA, VIL = 0.8V

VCC = 5.5V, VIH = 2.75V, IOH = -50µA, VIL = 0.8V

GND

GROUP

A SUB-

GROUPS TEMPERATURE

1 +25oC-40µA

2, 3 +125oC, -55oC - 750 µA

1 +25oC 7.2 - mA

2, 3 +125oC, -55oC 6.0 - mA

1 +25oC -7.2 - mA

2, 3 +125oC, -55oC -6.0 - mA

1, 2, 3 +25oC, +125oC, -55oC - 0.1 V

1, 2, 3 +25oC, +125oC, -55oC VCC

1 +25oC-±0.5 µA

2, 3 +125oC, -55oC-±5.0 µA

LIMITS

-V

-0.1

-V

-0.1

UNITSMIN MAX

Three-State Output Leakage Current

Noise Immunity Functional Test

NOTES:

1. All voltages referenced to device GND.

2. For functional tests, VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.

IOZ Applied Voltage = 0V or

VCC, VCC = 5.5V

FN VCC = 4.5V, VIH = 2.25V,

VIL = 0.8V (Note 2)

1 +25oC-±1 µA

2, 3 +125oC, -55oC-±50 µA

7, 8A, 8B +25oC, +125oC, -55oC---

684

Spec Number 518630

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