Intersil Corporation HCTS393MS Datasheet

August 1995

HCTS393MS

Radiation Hardened

Dual 4-Stage Binary Counter

Features

• 3 Micron Radiation Hardened CMOS SOS

• Total Dose 200K RAD (Si)

• SEP Effective LET No Upsets: >100 MEV-cm

• Single Event Upset (SEU) Immunity < 2 x 10

/mg

-9

Errors/

Bit-Day (Typ)

• Dose Rate Survivability: >1 x 10

• Dose Rate Upset >10

RAD (Si)/s 20ns Pulse

RAD (Si)/s

• Latch-Up Free Under Any Conditions

• Fanout (Over Temperature Range)

- Standard Outputs: 10 LSTTL Loads

• Military Temperature Range: -55

C to +125oC

• Signiﬁcant Power Reduction Compared to LSTTL ICs

• DC Operating Voltage Range: 4.5V to 5.5V

• LSTTL Input Compatibility

- VIL = 0.8V Max

- VIH = VCC/2 Min

• Input Current Levels Ii ≤ 5µA at VOL, VOH

Description

The Intersil HCTS393MS is a Radiation Hardened 4-stage riple-carry binary counter. All counter stages are masterslave ﬂip-ﬂop. The state of the stage advances one count on the negative transition of each clock pulse. A high voltage level on the MR line resets all counters to their zero state. All inputs and outputs are buffered.

The HCTS393MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family.

Pinouts

MR 1

Q0 1 Q1 1 Q2 1 Q3 1 GND

14 LEAD CERAMIC DUAL-IN-LINE

METAL SEAL PACKAGE (SBDIP)

MIL-STD-1835 CDIP2-T14

TOP VIEW

CP 1

1 2

MR 1

Q0 1

Q1 1

Q2 1

Q3 1

GND

14 LEAD CERAMIC METAL SEAL

FLATPACK PACKAGE (FLATPACK)

MIL-STD-1835 CDFP3-F14

TOP VIEW

1CP 1 2 3 4 5 6 7

VCC

2 MR

2 Q0

2 Q1

2 Q2

2 Q3

14 13

12 11 10

9 8

VCC 2

CP 2 MR 2 Q0 2 Q1 2 Q2 2 Q3

The HCTS393MS is supplied in a 14 lead Ceramic ﬂatpack (K sufﬁx) or a SBDIP Package (D sufﬁx).

Ordering Information

PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE

HCTS393DMSR -55oC to +125oC Intersil Class S Equivalent 14 Lead SBDIP

HCTS393KMSR -55oC to +125oC Intersil Class S Equivalent 14 Lead Ceramic Flatpack

HCTS393D/Sample +25oC Sample 14 Lead SBDIP

HCTS393K/Sample +25oC Sample 14 Lead Ceramic Flatpack

HCTS393HMSR +25oC Die Die

672

Spec Number

File Number 3071.1

DB NA

518633

Functional Diagram

HCTS393MS

1(13)

2(12)

TRUTH TABLE

COUNT

0LLLL

1HLLL

Q0 Q1 Q2 Q3

3(11) 4(10) 5(9) 6(8)

Q0 Q1 Q2 Q3

OUTPUTS

CP MR OUTPUT

TRUTH TABLE

L No Change

L Count

X H L L L L

2LHLL

3HHLL

4LLHL

5HLHL

6LHHL

7HHHL

8LLLH

9HLLH

10 L H L H

11 H H L H

12 L L H H

13 H L H H

14LHHH

15HHHH

H = High Lvel L = Low Logic Level X = Immaterial

= Low-to-High = High-to-Low

673

Spec Number 518633

Speciﬁcations HCTS393MS

Absolute Maximum Ratings Reliability Information

Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to +7.0V

Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V

DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA

DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .±25mA

(All Voltage Reference to the VSS Terminal)

Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC

Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC

Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC

ESD Classiﬁcation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1

CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation.

Operating Conditions

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V

Input Rise and Fall Times at 4.5V VCC (tr, tf) . . . . . . . . .500ns Max

Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS

Thermal Resistance θ

SBDIP Package. . . . . . . . . . . . . . . . . . . . 74oC/W 24oC/W

Ceramic Flatpack Package . . . . . . . . . . . 116oC/W 30oC/W

Maximum Package Power Dissipation at +125oC Ambient

SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.68W

Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.43W

If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate:

SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13.5mW/oC

Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . .8.6mW/oC

Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V

Input High Voltage (VIH). . . . . . . . . . . . . . . . . . . . . . .VCC/2 to VCC

(NOTE 1)

PARAMETER SYMBOL

Quiescent Current ICC VCC = 5.5V,

Output Current (Sink)

Output Current (Source)

Output Voltage Low VOL VCC = 4.5V, VIH = 2.25V,

Output Voltage High VOH VCC = 4.5V, VIH = 2.25V,

Input Leakage Current

IOL VCC = 4.5V, VIH = 4.5V,

IOH VCC = 4.5V, VIH = 4.5V,

IIN VCC = 5.5V, VIN = VCC or

CONDITIONS

VIN = VCC or GND

VOUT = 0.4V, VIL = 0V

VOUT = VCC - 0.4V, VIL = 0V

IOL = 50µA, VIL = 0.8V

VCC = 5.5V, VIH = 2.75V, IOL = 50µA, VIL = 0.8V

IOH = -50µA, VIL = 0.8V

VCC = 5.5V, VIH = 2.75V, IOH = -50µA, VIL = 0.8V

GND

GROUP

A SUB-

GROUPS TEMPERATURE

1 +25oC-40µA

2, 3 +125oC, -55oC - 750 µA

1 +25oC 4.8 - mA

2, 3 +125oC, -55oC 4.0 - mA

1 +25oC -4.8 - mA

2, 3 +125oC, -55oC -4.0 - mA

1, 2, 3 +25oC, +125oC, -55oC - 0.1 V

1, 2, 3 +25oC, +125oC, -55oC VCC

1 +25oC-±0.5 µA

2, 3 +125oC, -55oC-±5.0 µA

LIMITS

-V

-0.1

-V

-0.1

UNITSMIN MAX

Noise Immunity Functional Test

NOTES:

1. All voltages referenced to device GND.

2. For functional tests, VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.

FN VCC = 4.5V, VIH = 2.25V,

VIL = 0.8V (Note 2)

7, 8A, 8B +25oC, +125oC, -55oC---

674

Spec Number 518633

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