Intersil Corporation HCTS299MS Datasheet
August 1995
HCTS299MS
Radiation Hardened
8-Bit Universal Shift Register; Three-State
Features
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
• Single Event Upset (SEU) Immunity < 2 x 10
2
/mg
-9
Errors/
Bit-Day (Typ)
12
• Dose Rate Survivability: >1 x 10
• Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
RAD (Si)/s
• Latch-Up Free Under Any Conditions
• Fanout (Over Temperature Range)
-Bus Driver Outputs: 15 LSTTL Loads
• Military Temperature Range: -55
o
C to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
-VIL = 0.8V Max
-VIH = VCC/2 Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
Description
The Intersil HCTS299MS is a Radiation Hardened 8-bit shift/
storage register with three-state bus interface capability . The
register has four synchronous operating modes controlled by
the two select inputs (S0, S1). The mode select, the serial
data (DS0, DS7) and the parallel data (IO0 - IO7) respond
only to the low to high transition of the clock (CP) pulse. S0,
S1 and the data inputs must be one set up time period prior
to the clocks positive transition. The master reset (
asynchronous active low input.
The HCTS299MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family
with TTL input compatibility.
MR) is an
Pinouts
S0
OE1
OE2
I/O6
I/O4
I/O2
I/O0
Q0
MR
GND
20 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T20
TOP VIEW
1
S0
OE1
2
OE2
3
I/O6
4
I/O4
5
I/O2
6
I/O0
7
8
Q0
9
MR
GND
10
20 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F20
TOP VIEW
120
2
3
4
5
6
7
8
9
10
VCC
20
S1
19
DS7
18
Q7
17
I/O7
16
I/O5
15
I/O3
14
I/O1
13
12
CP
DS0
11
19
18
17
16
15
14
13
12
11
VCC
S1
DS7
Q7
I/O7
I/O5
I/O3
I/O1
CP
DS0
Ordering Information
PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE
HCTS299DMSR -55oC to +125oC Intersil Class S Equivalent 20 Lead SBDIP
HCTS299KMSR -55oC to +125oC Intersil Class S Equivalent 20 Lead Ceramic Flatpack
HCTS299D/Sample +25oC Sample 20 Lead SBDIP
HCTS299K/Sample +25oC Sample 20 Lead Ceramic Flatpack
HCTS299HMSR +25oC Die Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
| Copyright © Intersil Corporation 1999
624
Spec Number
File Number 3069.1
DB NA
518640
Functional Block Diagram
HCTS299MS
STANDARD
OUTPUT
20 19 18 17 16 15 14 13 12 11
VCC
CL
CL
S1
S1
S0
S0
OE
OE
OE
OE
Q
DD7R
Q7 Q5 Q3 Q1
Q6 Q4 Q2 Q0
D6 D4 D2 D0
CL
CL
DR
Q
BUS LINE OUTPUTS
OE
OE
D5
CL
Q
DR
CL
CL
CL
DR
Q
OE
OE
D3 D1
CL
Q
DR
CL
CL
CL
DR
Q
Q
DR
CL
CL
OE
OE
CL
CL
DR
Q
CL
MODE
SELECT
LOGIC
CL
DS0CPI/O1I/O3I/O5I/O7Q7DS7S1
OE
OE
123456 7 89
S0
OE1 OE2 I/O6 I/O4 I/O2 I/O0 Q0 MR
OE
OE
BUS LINE OUTPUTS
OE
OE
OE
OE
STANDARD
OUTPUT
GND
10
625
Spec Number 518640
HCTS299MS
TRUTH TABLE
Register Operating Modes
INPUTS REGISTER OUTPUTS
FUNCTION
Reset (Clear) L XXXXXXLL. . .LL
Shift Right H h l l X X L q0 . . . q5 q6
Shift Left H l h X l X q1 q2 . . . q7 L
Hold (Do Nothing) H l l X X X q0 q1 . . . q6 q7
Parallel Load H h h X X l L L . . . L L
FUNCTION
Read Register L L L X L L
MR CP S0 S1 DS0 DS7 I/On Q0 Q1 . . . Q6 Q7
H h l h X X H q0 . . . q5 Q6
H l h X h X q1 q2 . . . q7 H
H h h X X h H H . . . H H
TRUTH TABLE
Three-State I/O Port Operating Mode
INPUTS INPUTS/OUTPUTS
OE1 OE2 S0 S1 Qn (REGISTER) I/O0 . . . I/O7
LLLX H H
LLXL L L
LLXL H H
Load Register X X H H Qn = I/On I/On = Inputs
Disable I/O H X X X X Z
XHXX X Z
H = HighVoltage Level
L = Low Voltage Level
X = Immaterial
Z = Output in High Impedance State
h = Input Voltage High One Setup Time Prior Clock Transition
l = Input voltage Low One Setup Time Prior Clock Transition
= Low-to-High Clock Transition
qn = Lower Case Letter Indicates the State of the Referenced Output One Setup Time Prior Clock Transition
626
Spec Number 518640
Specifications HCTS299MS
Absolute Maximum Ratings Reliability Information
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation.
Operating Conditions
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC
Input Rise and Fall Times at 4.5V VCC (TR, TF). . . . . . .500ns Max
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
Thermal Resistance θ
SBDIP Package. . . . . . . . . . . . . . . . . . . . 72oC/W 24oC/W
Ceramic Flatpack Package . . . . . . . . . . . 107oC/W 28oC/W
Maximum Package Power Dissipation at +125oC Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.69W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.47W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13.9mW/oC
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . .9.3mW/oC
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V
Input High Voltage (VIH). . . . . . . . . . . . . . . . . . . . . . .VCC/2 to VCC
JA
θ
JC
(NOTE 1)
PARAMETER SYMBOL
Quiescent Current ICC VCC = 5.5V,
Output Current
(Sink)
Output Current
(Source)
Output Voltage Low VOL VCC = 4.5V, VIH = 2.25V,
Output Voltage High VOH VCC = 4.5V, VIH = 2.25V,
Input Leakage
Current
IOL VCC = 4.5V, VIH = 4.5V,
IOH VCC = 4.5V, VIH = 4.5V,
IIN VCC = 5.5V, VIN = VCC or
CONDITIONS
VIN = VCC or GND
VOUT = 0.4V, VIL = 0V
VOUT = VCC - 0.4V,
VIL = 0V
IOL = 50µA, VIL = 0.8V
VCC = 5.5V, VIH = 2.75V,
IOL = 50µA, VIL = 0.8V
IOH = -50µA, VIL = 0.8V
VCC = 5.5V, VIH = 2.75V,
IOH = -50µA, VIL = 0.8V
GND
GROUP
A SUB-
GROUPS TEMPERATURE
1 +25oC-40µA
2, 3 +125oC, -55oC - 750 µA
1 +25oC 7.2 - mA
2, 3 +125oC, -55oC 6.0 - mA
1 +25oC -7.2 - mA
2, 3 +125oC, -55oC -6.0 - mA
1, 2, 3 +25oC, +125oC, -55oC - 0.1 V
1, 2, 3 +25oC, +125oC, -55oC - 0.1 V
1, 2, 3 +25oC, +125oC, -55oC VCC
1, 2, 3 +25oC, +125oC, -55oC VCC
1 +25oC-±0.5 µA
2, 3 +125oC, -55oC-±5.0 µA
LIMITS
-V
-0.1
-V
-0.1
UNITSMIN MAX
Three-State Output
Leakage Current
Noise Immunity
Functional Test
NOTES:
1. All voltages referenced to device GND.
2. For functional tests, VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
IOZ Applied Voltage = 0V or
VCC, VCC = 5.5V
FN VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V (Note 2)
1 +25oC-±1 µA
2, 3 +125oC, -55oC-±50 µA
7, 8A, 8B +25oC, +125oC, -55oC---
627
Spec Number 518640
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