• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
Description
The Intersil HCTS02MS is a Radiation Hardened Quad 2-Input
NOR Gate. A low on both inputs forces the output to a High state.
The HCTS02MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
Pinouts
A1
B1
Y2
A2
B2
GND
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T14
TOP VIEW
Y1
1
2
A1
3
B1
4
Y2
5
A2
6
B2
7
GND
14 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP3-F14
TOP VIEW
1Y1
2
3
4
5
6
7
14
VCC
13
Y4
12
B4
11
A4
10
Y3
9
B3
8
A3
14
13
12
11
10
9
8
VCC
Y4
B4
A4
Y3
B3
A3
The HCTS02MS is supplied in a 14 lead Ceramic Flatpack Package (K suffix) or a 14 lead SBDIP Package (D suffix).
Ordering Information
PART
NUMBER
HCTS02DMSR-55oC to +125oCIntersil Class
HCTS02KMSR-55oC to +125oCIntersil Class
TEMPERATURE
RANGE
SCREENING
LEVELPACKAGE
14 Lead SBDIP
S Equivalent
14 Lead Ceramic
S Equivalent
Flatpack
NOTE: L = Logic Level Low, H = Logic level High
Functional Diagram
HCTS02D/
Sample
HCTS02K/
Sample
HCTS02HMSR+25oCDieDie
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation..
Input CapacitanceCINVCC = 5.0V, f = 1MHz1+25oC-10pF
Output Transition
Time
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
CPDVCC = 5.0V, f = 1MHz1+25oC-45pF
TTHL
TTLH
CONDITIONS
VCC = 4.5V1+25oC-15ns
A SUB-
GROUPSTEMPERATURE
10, 11+125oC, -55oC220ns
10, 11+125oC, -55oC222ns
1+125oC, -55oC-68pF
1+125oC-10pF
1+125oC-22ns
LIMITS
UNITSMINMAX
LIMITS
UNITSMINMAX
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
(NOTES 1, 2)
PARAMETERSSYMBOL
Quiescent CurrentICCVCC = 5.5V, VIN = VCC or GND+25oC-0.2mA
Output Current (Sink)IOLVCC = 4.5V, VIN = VCC or GND, VOUT = 0.4V+25oC4.0-mA
Output Current
(Source)
Output Voltage LowVOLVCC = 4.5V or 5.5V, VIH = VCC/2,
Output Voltage HighVOHVCC = 4.5V or 5.5V, VIH = VCC/2,